Patents by Inventor Ran Zhang
Ran Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12730279Abstract: Disclosed herein is metasurface modules configured to reduce the cost of integration of metasurface elements within a housing and methods of manufacturing thereof. One particular embodiment includes a metasurface module including: a secondary substrate; and a metasurface chip mounted on the secondary substrate. The secondary substrate laterally extends from all sides of the metasurface chip to completely surround the metasurface chip. The secondary substrate may be utilized to mount the metasurface chip within a housing which decreases the size of the metasurface chip and ultimately decreases manufacturing costs of the metasurface chip.Type: GrantFiled: December 30, 2022Date of Patent: September 8, 2026Assignee: Metalenz, Inc.Inventors: John Graff, Carlos Calvo, Ran Zhang, Richard Norton
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Publication number: 20260248966Abstract: The present application discloses use of FcgammaRIIB as an IgG transport receptor in mammary gland of mammals, and belongs to the field of biotechnology. FcgammaRIIB knockout mice and FcgammaRIIB knockout pigs are constructed, and the ratio of mammalian serum IgG to milk IgG in the FcgammaRIIB knockout mice is significantly increased, indicating a decrease in relative milk IgG concentration. Although mammalian serum IgG content is significantly increased in the FcgammaRIIB knockout pigs, IgG in colostrum of mammals is nearly undetectable. Therefore, the present application demonstrates for the first time that FcgammaRIIB serves as the receptor mediating transport of mammalian serum IgG across the mammary epithelial barrier into milk, which addresses a long-standing unresolved issue in the field of maternal passive immunity. Furthermore, the present application provides a new strategy for increasing colostrum IgG content, thereby enhancing early immunity and survival rate of newborn livestock.Type: ApplicationFiled: January 14, 2026Publication date: August 27, 2026Inventors: Yaofeng ZHAO, Xin LI, Lijuan DU, Zihui WAN, Dengke PAN, Haitang HAN, Ran ZHANG
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Patent number: 12718564Abstract: The present disclosure provides methods, apparatuses, and computer-readable media for step discovery and localization in an instructional video. In some embodiments, the method includes extracting, from the instructional video using a transformer model, a plurality of step slots corresponding to a plurality of procedure steps depicted in the instructional video, matching, using an order-aware sequence-to-sequence alignment model, a plurality of video segments of the instructional video to the plurality of step slots, generating a temporally-ordered plurality of video segments from the plurality of video segments, receiving a user query requesting a procedure step, selecting, from the plurality of video segments of the instructional video, a corresponding video segment corresponding to the requested procedure step, and providing, in response to the user query, the corresponding video segment and the matching textual step description of the corresponding video segment.Type: GrantFiled: July 28, 2023Date of Patent: August 25, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mikita Dvornik, Isma Hadji, Ran Zhang, Konstantinos Derpanis, Richard Wildes, Animesh Garg, Allan Douglas Jepson
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Patent number: 12709713Abstract: The present application provides a treatment method and device for a waste plastic. A first aspect of the present application provides a treatment method for a waste plastic, including: firstly subjecting the waste plastic to a first pre-treatment to remove impurity and grease on a surface of the waste plastic, then subjecting the waste plastics to a second pre-treatment to convert a solid waste plastic into one in flow state; and finally, subjecting the waste plastic in flow state to a first cracking treatment and a second cracking treatment in sequence. Through the method provided in the present application, while cracking the waste plastic, chlorine element in the waste plastic may be removed by a multi-stage adsorption, which reduces chlorine content in the cracked oil, reduces pressure and burden in subsequent refining, and meets the limitation of the chlorine content in cracked products in downstream processes.Type: GrantFiled: September 13, 2024Date of Patent: August 18, 2026Assignee: PETROCHINA COMPANY LIMITEDInventors: Xiaoliang Yuan, Junwei Lei, Yuandong Hou, Pei Wu, Zhanquan Zhang, Yue Wang, Yan Wang, Ran Zhang, Bin Xie, Fei Chen
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Publication number: 20260235900Abstract: A display substrate and a display apparatus. The display substrate comprises a display area. The display substrate comprises a first substrate (101), a second substrate (102), and a liquid crystal layer (40). The first substrate (101) and the second substrate (102) are arranged opposite one another. The liquid crystal layer (40) is located between the first substrate (101) and the second substrate (102). The first substrate (101) comprises a first base substrate (10), a driving circuit layer (20) located on a side of the first base substrate (10) facing the second substrate (102), a pixel electrode (32) located on a side of the first base substrate (10) facing the second substrate (102), and a common electrode (31). The second substrate (102) comprises a second base substrate (50) and a transparent conductive layer (60) located on a side of the second base substrate (50) facing the first substrate (101), and the transparent conductive layer (60) is at least located in the display area.Type: ApplicationFiled: September 12, 2023Publication date: August 13, 2026Inventors: Ran ZHANG, Xinxia ZHANG, Feifei ZHU, Chengyong ZHAN
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Patent number: 12700216Abstract: The present disclosure provides methods, apparatuses, and computer-readable mediums for performing data augmentation. In some embodiments, a method of performing data augmentation by a device includes obtaining a plurality of images from a dataset. The method further includes computing, for each image of the plurality of images, a corresponding saliency map based on a gradient of a full loss function of that image. The method further includes selecting, from a subset of arrangements of a plurality of possible arrangements, a rearrangement offset that maximizes an overall saliency of a resulting image combining the plurality of images. The method further includes generating, using the rearrangement offset and a plurality of mixing ratios, a new mixed image from the plurality of images and a new mixed label from corresponding labels of the plurality of images. The method further includes augmenting the dataset with the new mixed image and the new mixed label.Type: GrantFiled: May 24, 2023Date of Patent: August 4, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Bojie Ma, Mikita Dvornik, Ran Zhang, Konstantinos Derpanis, Afsaneh Fazly
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Publication number: 20260188168Abstract: A driving circuit includes a driving control signal generation circuit and a multi-channel output circuit; the multi-channel output circuit includes N stage of output sub-circuits; N is an integer greater than 1; the driving control signal generation circuit is configured to generate a driving control signal, and the driving control signal is output through the driving control signal output terminal; an nth output sub-circuit is electrically connected to the driving control signal output terminal, an nth output clock signal line and an nth driving signal output terminal respectively, the nth output sub-circuit is configured to control the nth output clock signal line to provide an nth output clock signal to the nth driving signal output terminal under the control of the driving control signal; n is a positive integer less than or equal to N.Type: ApplicationFiled: April 26, 2023Publication date: July 2, 2026Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ran ZHANG, Yongxian XIE, Xiaoye MA, Tong YANG, Liping LEI, Zhixiang ZOU, Yongcan WANG, Fengzhen LV
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Publication number: 20260188240Abstract: Disclosed is a shift register including: an input sub-circuit, an output sub-circuit and a first control sub-circuit, wherein the input sub-circuit is electrically connected to a signal input end and a pull-up node, and is configured to provide a signal to the pull-up node under the control of a signal from the signal input end; the output sub-circuit is electrically connected to a first output end, the pull-up node and a clock signal end, and is configured to provide a signal from the clock signal end to the first output end under the control of a signal from the pull-up node; and the first control sub-circuit is electrically connected to a control signal end and a signal input end, and is configured to provide a signal from the control signal end to the signal input end under the control of the signal from the control signal end.Type: ApplicationFiled: June 19, 2024Publication date: July 2, 2026Inventors: Tingting ZHAO, Tong YANG, Peng WU, Miao ZHANG, Youlu LI, Xiong XIONG, Ran ZHANG, Yongcan WANG
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Publication number: 20260173530Abstract: An array substrate includes a plurality of first wiring lines and a plurality of second wiring lines arranged on a base substrate, the first wiring lines and the second wiring lines intersect each other to define a plurality of pixel areas, each of the pixel areas comprises a transistor, a first electrode, a second electrode, a first via hole and a second via hole; an orthographic projection of the first via hole on the base substrate at least partially overlaps an orthographic projection of the first electrode on the base substrate, and an orthographic projection of the second via hole on the base substrate at least partially overlaps the orthographic projection of the first electrode on the base substrate; the orthographic projection of the first via hole on the base substrate does not overlap an orthographic projection of the second electrode on the base substrate.Type: ApplicationFiled: October 18, 2023Publication date: June 18, 2026Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.Inventors: Ran ZHANG, Yongxian XIE, Zhixiang ZOU, Liang LIN, Xiaoye MA, Yongcan WANG, Zhangtao WANG, Hui GUO, Zhiwei DING
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Patent number: 12646433Abstract: A shift-register unit, a grid driving circuit and a displaying device, which relates to the technical field of displaying. In the present disclosure, the oxide-semiconductor layers of the oxide thin-film transistors may be delimited into regions according to the total channel widths and the channel lengths required by the oxide thin-film transistors in the shift-register unit, wherein the sum of the widths of the independent semiconductor branches obtained by the delimitation is equal to the required total channel width. Accordingly, one oxide thin-film transistor can realize the required total channel width by using the one or more semiconductor branches, to ensure the normal operation of the oxide thin-film transistor, whereby the oxide-semiconductor layers of the different oxide thin-film transistors can be configured differently, to realize the purpose of reducing the border frame of the displaying device.Type: GrantFiled: October 29, 2024Date of Patent: June 2, 2026Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yongxian Xie, Zhixiang Zou, Feng Qu, Chuanjiang Tang, Tong Yang, Xiaoye Ma, Fengzhen Lv, Ran Zhang
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Patent number: 12638722Abstract: An array substrate (ARR) includes a base substrate (BP), a first electrode layer (EDLA), an insulating layer (PVX) and a second electrode layer (EDLB) stacked in sequence; where one of the first electrode layer (EDLA) and the second electrode layer (EDLB) is provided with a slit electrode (SLD); the array substrate (ARR) further includes a plurality of data lines (DataL), and a part of the data lines (DataL) adjacent to the slit electrode (SLD) extends linearly along a column direction (DV); the slit electrode (SLD) is provided with a plurality of slits (SL), the slits (SL) include a first slit section (SLA), and an angle between an extending direction of the first slit section (SLA) and a row direction (DH) is in a range of 69° to 85°.Type: GrantFiled: June 30, 2022Date of Patent: May 26, 2026Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Quan Gan, Ran Zhang, Yongcan Wang, Mingfei Zhang
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Publication number: 20260136672Abstract: A display substrate and a display apparatus are provided. The display substrate includes a base substrate, and gate lines and data lines cross with each other to define pixel units. Each pixel unit includes a first transistor and a second transistor, an active layer of the first transistor includes a first contact portion and a second contact portion, an active layer of the second transistor includes a third contact portion and a fourth contact portion, the first contact portion is electrically connected to the corresponding data line, the second contact portion is electrically connected to the third contact portion, and the fourth contact portion is electrically connected to the first electric pole. Along the second direction, a maximum distance between the first contact portion and the corresponding gate line is not less than a maximum distance between the fourth contact portion and the same gate line.Type: ApplicationFiled: August 11, 2023Publication date: May 14, 2026Inventors: Zhixiang ZOU, Liang LIN, Zhangtao WANG, Ran ZHANG, Zhonghao HUANG, Zhong XU, Chuan CHEN, Shuai YUAN
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Patent number: 12612554Abstract: A liquid crystal aligning agent includes polymer(s) from at least one of polyamic acid and group of polyimides by ring closure thereof. The acid includes a first segment structure formed by first dianhydride of formula (I) and first diamine of formula (II) or (III). X1 is an amorphous first soft segment. L is single bond, double bond, divalent or trivalent hydrocarbon group having 1 to 3 Cs. Y1 is single bond, O, NH, S, unsaturated double bond(s), or aliphatic, aromatic, heterocyclic or fused ring. One A1 and one A2, combined with Y1, are each C. Remaining A1s and A2s are each CH, CR or N. Z1 is aliphatic, aromatic, heterocyclic or fused ring. A3s and A4s are each CH, CR or N. Neither of numbers of Ns in the A1s, A2s, A3s and A4s is more than two, R1, R2 and R are each hydrogen or aliphatic hydrocarbon group.Type: GrantFiled: August 10, 2021Date of Patent: April 28, 2026Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Jian Ma, Wenming Ren, Chengyong Zhan, Ran Zhang
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Publication number: 20260095422Abstract: According to an embodiment of the disclosure, a method, apparatus, device, and storage medium for session interaction is provided. The method includes receiving a selection of one or more target digital assistants in a target session by a user, the one or more target digital assistants being not members of the target session, and members of the target session comprising a plurality of digital assistants; presenting a first message sent by the user in the target session; and presenting one or more reply messages for the first message sent by the one or more target digital assistants, respectively. Therefore, the user can select a digital assistant that does not belong to the session to reply to the message sent by the user, thereby improving convenience of interaction between the user and the digital assistant.Type: ApplicationFiled: July 31, 2024Publication date: April 2, 2026Inventors: Ran Zhang, Ziyang Zheng, Song Luo, Daoyu Wang
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Publication number: 20260051907Abstract: A method of operating a communication device includes amplifying a preset proportion of symbols in a set of input symbols to generate a set of amplified symbols, accumulating the set of amplified symbols to generate an enhanced symbol, searching for a first path according to the enhanced symbol, accumulating unamplified symbols in the set of input symbols to generate an normal symbol, and searching for the first path according to the normal symbol. The method further includes generating a first path signal if the first path is found according to the enhanced symbol and/or the normal symbol, and generating a first path dynamic range (FPDR) according to at least the first path signal.Type: ApplicationFiled: June 12, 2025Publication date: February 19, 2026Applicant: Realtek Semiconductor Corp.Inventors: Ran Zhang, Mingzhi Guo
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Publication number: 20260050064Abstract: A method for enhancing timing performance of ultra-wideband (UWB) ranging with aid of phase detection and associated apparatus such as a communication circuit and an electronic device are provided. The method may include: utilizing a time coarse estimation circuit within a UWB ranging processing circuit to perform time coarse estimation according to a UWB signal to generate at least one time estimation result; and utilizing a time fine estimation circuit within the UWB ranging processing circuit to perform time fine estimation according to the at least one time estimation result to generate an estimated time; where the time coarse estimation circuit performs the phase detection according to a feature database within the communication circuit and at least one feature obtained from the UWB signal, to generate at least one fractional part of the at least one time estimation result, for enhancing time accuracy in advance to enhance the timing performance.Type: ApplicationFiled: July 28, 2025Publication date: February 19, 2026Applicant: Realtek Semiconductor Corp.Inventor: RAN ZHANG
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Publication number: 20260046239Abstract: The present disclosure provides a satellite network deterministic route construction method, forwarding method, and system. The deterministic route construction method includes: according to service data and topology information of an entire satellite network, searching for a plurality of feasible paths from the source node to the destination node corresponding to the service data; according to transmission configuration information of the service data and the topology information of the entire satellite network, screening out, from the plurality of feasible paths, a feasible path satisfying a preset transmission demand as present target feasible path; and determining path overhead of each target feasible path, and selecting a feasible path with lowest path overhead as a deterministic forwarding path of the service data.Type: ApplicationFiled: October 17, 2025Publication date: February 12, 2026Applicant: BEIJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONSInventors: Ran ZHANG, Xinyuan ZHANG, Jiang LIU, Zekun SUN, Shiran SUN
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Publication number: 20260029679Abstract: A display substrate is provided to include a base substrate including an active display region and a dummy region, the dummy region includes at least one first dummy sub-region arranged in a first direction together with the active display region; active gate lines in the active display region and extending along the first direction, at least one end of at least one active gate line extends into a first dummy sub-region on the same side as the at least one end; and at least one dummy data line within the first dummy sub-region and extending along a second direction; an orthographic projection of an end of the at least one active gate line in the first dummy sub-region on the base substrate does not overlap with an orthographic projection of any dummy data line on the base substrate. A display panel and a display apparatus are further provided.Type: ApplicationFiled: April 16, 2024Publication date: January 29, 2026Inventors: Ruifang DU, Meng GENG, Guangying MOU, Ran ZHANG, Yongcan WANG, Xiaoye MA
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Publication number: 20260016727Abstract: Provided is display panel. The display panel includes: a base substrate; multiple first signal traces, multiple second signal traces, multiple pixel circuits arranged in an array, multiple pixel electrodes corresponding to the plurality of pixel circuits, a common electrode provided with multiple first openings corresponding to the plurality of pixel circuits, and a black matrix layer, wherein an orthographic projection of each first opening on the base substrate covers orthographic projections of the first connection position, the second connection position, and the third connection position of the pixel circuit corresponding to the first opening on the base substrate, and an orthographic projection of the black matrix layer on the base substrate covers orthographic projections of the first openings on the base substrate.Type: ApplicationFiled: April 18, 2024Publication date: January 15, 2026Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Ran ZHANG, Xiaofang GU, Xiaoye MA, Yanchun LU, Yongcan WANG, Quan GAN
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Patent number: D1112034Type: GrantFiled: September 20, 2024Date of Patent: February 10, 2026Inventor: Ran Zhang