Abstract: A connection assembly (40) for operably coupling a plurality of independent imaging devices (41, 41;, 41") to an optical subsystem (42). The connection assembly (40) includes a unitary flex circuit device (43) having an elongated arm portion (45), and a plurality independent finger portions (46, 46', 46") extending from a distal end of the arm portion (45). Each finger portion (46, 46', 46") defines a coupling region (47, 47', 47") adapted to operably couple a respective imaging device (41, 41', 41") to a respective finger portion (46, 46', 46") for support thereof. The finger portions (46, 46', 46") are further adapted to strategically couple each respective imaging device (41, 41', 41") to the optical subsystem (42) as a unit. The flex circuit device (30) includes a plurality of circuits (65) terminating at respective terminals (40) of a coupling region (47) thereof. The terminals (66) supportively and communicably coupled to the bond pads (67) of the die (58) for support thereof.

Abstract: Disclosed are methods and apparatuses that allow the dicing of wafers containing microelectromechanical systems into singulated individual dies that is economic to use and leaves substantially no residue on the surface of the individual dies. A method for packaging the dice singulated according to the present invention is also disclosed.

Abstract: Disclosed is a lead frame and method for making a lead frame that is at least partially coated with a non-wettable material that is substantially anti-adhesive to solder materials. Once the non-wetting layer is applied to the lead frame, selected regions of the lead frame are plated with a wettable material that is solderable and bondable. In this manner, a solder paste may be used to attach a discrete component to selected regions of the wettable material, and wire bonds may be attached to other regions of the wettable material. Advantageously, the solder material is substantially prevented from spreading over portions of the lead frame coated with the non-wettable material.

Abstract: A panel of, for example, bismaleimide triazine (BT) or ceramic (Al.sub.2 O.sub.3) is chosen in size to be substantially filled with and taken up by end-result ball grid array (BGA) devices. The end-result devices are positioned closely together and take up substantially the entire area of the initial panel. Structural weakening is provided at appropriate places in the panel to allow the devices to be readily singulated.

Abstract: A lead frame for a semiconductor device includes a base which is coated by a protective coating. The lead frame base is made of a ferrous material. The protective coating is made by sequentially electroplating a copper-containing layer, a silver-containing layer and a palladium-containing layer. Protective coatings constructed in this way are bondable, solderable, oxidation resistant, corrosion resistant, free of lead (Pb), resistant to high temperatures, cost effective, and cosmetically acceptable. It is also possible to use a layer of tin or a tin alloy in place of the silver layer.

Abstract: A lead frame for a semiconductor device includes a base layer which is coated by a protective coating. The protective coating includes a layer of nickel, over which is coated a layer of copper. The layer of copper is coated by a layer of silver over which is coated a layer of palladium. Protective coatings constructed in this way are bondable, solderable, oxidation resistant, corrosion resistant, free of lead (Pb), resistant to high temperatures, cost effective, and cosmetically acceptable. It is also possible to use a layer of tin or a tin alloy in place of the silver layer. It is possible to omit the nickel layer if the lead base layer is made of a ferrous material.

Abstract: A leadframe for use in an integrated circuit package including at least one integrated circuit die attached to the leadframe and an encapsulant material surrounding the die and portions of the leadframe is herein disclosed. The leadframe includes a central portion having a plurality of perforations through the central portion adapted to allow the flow of the encapsulant material through the perforations during the molding process of the manufacture of the integrated circuit package thereby (i) preventing the flow of the encapsulant material from shifting the die attach pad during the manufacture of the package and (ii) providing anchoring for the encapsulant material to the leadframe to prevent delamination and cracking of the package.

Abstract: A lead frame for a semiconductor device includes a base layer which is coated by a protective coating. The protective coating includes a layer of nickel, over which is coated a layer of copper. The layer of copper is coated by a layer of silver over which is coated a layer of palladium. Protective coatings constructed in this way are bondable, solderable, oxidation resistant, corrosion resistant, free of lead (Pb), resistant to high temperatures, cost effective, and cosmetically acceptable.

Abstract: Certain components of an integrated circuit package are disclosed herein including one or more dies, each of which has an array of die output/input bond pads, and die support means, for example a substrate or leadframe, which includes an array of electrically conductive leads. There is also disclosed herein a technique for wire bond connecting the bond pads of a particular die to either the bond pads of a second die or to the electrically conductive leads of the substrate or leadframe using a thermosonic or thermocompression ball bonding tool. In accordance with this technique, where at least one die is involved, connections are made to the bond pads of that die by means of stitch bonding in a way which does not damage the die.

Abstract: A transfer molded plastic package having a cavity for accommodating a semiconductor chip is disclosed. A leadframe assembly process is shown wherein the leadframe finger pattern is provided with a resilient or elastic O-ring bead. Top and bottom housing plates which have dimensions that are larger than the bead form the upper and lower surfaces of the package. These plates can be formed of any suitably rigid material. They may be composed of ceramic in low power devices. For high power operation at least one metal plate can be employed. The chip or chips are connected to the lead frame and, along with the top and bottom plates, is located in a transfer mold. The plates are in registy and located so that their outer edges extend beyond the O-ring bead. The mold cavities include faces which press against the plates which are held apart by the O-ring bead so that the bead is compressed by the mold closure.

Abstract: In a semiconductor device tape assembly bonding process the fingers of a copper tape are reflow soldered to metal bumps located on the semiconductor device. First, the semiconductor wafer is covered with a conductive film composed of thin layers of aluminum, nickel-vanadium alloy and gold. The bumps are then created by electroplating gold through openings in a photoresist mask. The gold bumps are overcoated with a contolled thickness tin layer and the tin is overcoated with a thin gold anticorrosion layer. The copper assembly tape is coated with a thin gold layer and are lightly pressed against the bumps by means of a thermode. The thermode is quickly heated to a temperature well above the gold-tin eutectic melting temperature and then rapidly cooled. The tin layer on the bump will combine with the adjacent gold to form a liquid phase eutectic which will form and contact both the copper finger and the gold bump. Upon cooling the eutectic melt will solder the finger to the bump.

Abstract: When ceramic packages are subjected to lead plating the solutions can reduce the glass oxides and produce metallization of the sealing glass. At best, this metallization is unsightly and at worst results in lead shorting. Such metallization can be greatly reduced or avoided by a pretreatment that passivates the glass. The pretreatment comprises an immersion in an aqueous solution of fluoboric acid or ammonium bifluoride. Improved solutions that additionally contain a wetting agent and other additives are disclosed.

Abstract: In a semiconductor device tape assembly bonding process the fingers of a copper tape are reflow soldered to metal bumps located on the semiconductor device. First, the semiconductor wafer is covered with a conductive film composed of thin layers of alumimum, nickel-vanadium alloy and gold. The bumps are then created by electroplating gold through openings in a photoresist mask. The gold bumps are overcoated with a controlled thickness tin layer and the tin is overcoated with a thin gold anticorrosion layer. The copper assembly tape is coated with a thin gold layer and are lightly pressed against the bumps by means of a thermode. The thermode is quickly heated to a temperature well above the gold-tin eutectic melting temperature and then rapidly cooled. The tin layer on the bump will combine with the adjacent gold to form a liquid phase eutetic which will form and contact both the copper finger and the gold bump. Upon cooling the eutectic melt will solder the finger to the bump.

Abstract: The copper tape that is used in the tape assembly of semiconductor devices is provided with a bondable surface by an electroplated layer of copper. The copper tape is passivated in a weak organic acid solution immediately after plating. In the preferred embodiment the copper tape is also cleaned and passivated prior to electroplating. The passivated copper can be thermosonically bonded using gold wires for up to 144 hours after preparation. The elimination of noble metal plating reduces assembly cost and the passivated copper bonds well to the subsequently applied plastic encapsulant.