Patents by Inventor Raul Enriquez Shibayama

Raul Enriquez Shibayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160174373
    Abstract: In one embodiment, the apparatus comprises: a substrate having a first side and a second side, the second side being on an opposite side of the substrate from the first side, where the substrate has a first location on the first side at which an semiconductor package is to be coupled; and a cable coupled to the substrate on the second side of the substrate at a second location on the second side, the second location being at least partially below the first location.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 16, 2016
    Inventors: Beom-Taek Lee, Raul Enriquez Shibayama
  • Patent number: 9338882
    Abstract: A broadside coupled differential design is described herein. The design may include a differential pair. Each trace of the differential pair includes a wide portion and a narrow portion. The wide portion of the first trace of the differential pair is to be aligned with a narrow portion of the second trace of the differential pair. Additionally, the wide portion of the second trace of the differential pair is to be aligned with a narrow portion of the first trace of the differential pair, such that the wide and narrow portions of the traces of the differential pair are staggered.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: May 10, 2016
    Assignee: Intel Corporation
    Inventors: Kai Xiao, Raul Enriquez Shibayama, Gong Ouyang
  • Patent number: 9337521
    Abstract: A circuit component is described herein. The circuit component includes a first signal line to propagate in a first direction and a second signal line to propagate a second direction. The circuit component includes a region to introduce crosstalk within the region that reduces another crosstalk generated at a location remote from the region based on a change in propagation direction of the first signal line and second signal line.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: May 10, 2016
    Assignee: Intel Corporation
    Inventors: Raul Enriquez Shibayama, Maria Garcia Garcia de Leon, Kai Xiao, Beom-Taek Lee, Carlos Lizalde Moreno
  • Publication number: 20150333387
    Abstract: A broadside coupled differential design is described herein. The design may include a differential pair. Each trace of the differential pair includes a wide portion and a narrow portion. The wide portion of the first trace of the differential pair is to be aligned with a narrow portion of the second trace of the differential pair. Additionally, the wide portion of the second trace of the differential pair is to be aligned with a narrow portion of the first trace of the differential pair, such that the wide and narrow portions of the traces of the differential pair are staggered.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 19, 2015
    Inventors: KAI XIAO, RAUL ENRIQUEZ SHIBAYAMA, GONG OUYANG
  • Patent number: 9113555
    Abstract: A method of reducing crosstalk. The method may include forming a first contact over a first vertical conductor. The method may include forming a second contact over a second vertical conductor. The method may include forming a capacitive coupler between the first contact and the second contact, wherein the capacitive coupler is to cancel crosstalk received at the second vertical conductor from the first vertical conductor.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: August 18, 2015
    Assignee: Intel Corporation
    Inventors: Raul Enriquez Shibayama, Xiaoning Ye, Kai Xiao, Benjamin Lopez Garcia
  • Publication number: 20150223336
    Abstract: A bridge device is described herein. The bridge device may include a first via of a bridge device, the first via of the bridge device having a short via stub or no via stub, the first via of the bridge device to be communicatively coupled to a first via of a printed circuit board (PCB). The bridge device may include a second via of the bridge device, the second via of the bridge device having a short via stub or no via stub, the second via of the bridge device to be communicatively coupled to a second via of the PCB. A trace of the bridge device may communicatively couple the first via of the bridge device to the second via of the bridge device.
    Type: Application
    Filed: January 31, 2014
    Publication date: August 6, 2015
    Applicant: INTEL CORPORATION
    Inventors: Beom-Taek Lee, Raul Enriquez-Shibayama, Carolina Garcia Robles
  • Publication number: 20150130553
    Abstract: A circuit component is described herein. The circuit component includes a first signal line to propagate in a first direction and a second signal line to propagate a second direction. The circuit component includes a region to introduce crosstalk within the region that reduces another crosstalk generated at a location remote from the region based on a change in propagation direction of the first signal line and second signal line.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 14, 2015
    Inventors: Raul Enriquez Shibayama, Maria Garcia Garcia de Leon, Kai Xiao, Beom-Taek Lee, Carlos Lizalde Moreno
  • Publication number: 20150085458
    Abstract: Inductive coupling arising between adjacent vias in interconnect technologies (commonly associated with printed circuit boards or package) can be combatted through the addition of metal plates to vias. The plates generate capacitive coupling that can compensate for the inductive crosstalk normally generated between vias in printed circuit boards or packages. When the added plates of two neighboring vias overlap with each other, a capacitive coupling is generated. By balancing the inductive coupling with capacitive coupling, an effective reduction of far end crosstalk may be obtained.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Inventors: Raul Enriquez Shibayama, Mauro Lai, Richard K. Kunze, Nicholas B. Peterson, Carlos A. Lizalde Moreno, Kai Xiao
  • Publication number: 20140174812
    Abstract: A method of reducing crosstalk. The method may include forming a first contact over a first vertical conductor. The method may include forming a second contact over a second vertical conductor. The method may include forming a third contact over a third vertical conductor. The method may include forming a capacitive coupler between the first contact, the second contact, and the third contact, wherein the capacitive coupler is to cancel crosstalk received at the second vertical conductor and third vertical conductor from the first vertical conductor.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Raul Enriquez Shibayama, Kai Xiao, Nicte A. Zavala Castro, Mauro Lai, Yanjie Zhu
  • Publication number: 20140179162
    Abstract: A method of reducing crosstalk. The method may include forming a first contact over a first vertical conductor. The method may include forming a second contact over a second vertical conductor. The method may include forming a capacitive coupler between the first contact and the second contact, wherein the capacitive coupler is to cancel crosstalk received at the second vertical conductor from the first vertical conductor.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Raul Enriquez Shibayama, Xiaoning Ye, Kai Xiao, Benjamin Lopez Garcia
  • Publication number: 20140162498
    Abstract: Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at least six (6) columns divided between a primary side and a secondary side of the connector.
    Type: Application
    Filed: March 31, 2012
    Publication date: June 12, 2014
    Inventors: Raul Enriquez-Shibayama, Kai Xiao, Xiang Li
  • Publication number: 20140140027
    Abstract: The present description relates to the field of fabricating microelectronic devices, wherein a microelectronic device may have a hexagonal confirmation for signal nodes and ground nodes which utilizes the cross-talk reduction by cancellation property of geometrically symmetry and orthogonality to reduce signal node to ground node ratio for increasing signaling density.
    Type: Application
    Filed: December 22, 2011
    Publication date: May 22, 2014
    Inventors: Raul Enriquez Shibayama, Jimmy A. Johansson, Kai Xiao