Abstract: Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate with a plurality of bonding pads thereon, and providing a plurality of solder microballs, the microballs including a coating thereon. The method also includes flowing the solder microballs onto the substrate and positioning the solder microballs on the bonding pads. The method also includes heating the solder microballs to reflow and form a joint between the solder microballs and the bonding pads. Other embodiments are described and claimed.

Abstract: An electronic package includes a substrate (110, 310, 510) and a solder resist layer (120, 320, 520) over the substrate. The solder resist layer has a plurality of solder resist openings (121, 321, 521) therein. The electronic package further includes a finish layer (130, 330, 535) in the solder resist openings, an electrically conducting layer (140, 440) in the solder resist openings over the finish layer, and a solder material (150, 810) in the solder resist openings over the electrically conducting layer. The electrically conducting layer electrically connects the solder resist openings in order to enable the electrokinetic deposition of the solder material.

Abstract: A method of forming solder bumps on a substrate is disclosed. The method includes forming a plurality of contact points on the substrate. The method further includes depositing a layer of surface finish material on the plurality of contact points. Furthermore, the method includes disposing a plurality of solder balls on the layer of surface finish material. Each solder ball of the plurality of solder balls has conductive material including a solder alloy and Phosphorus. Thereafter, the method includes applying a solder reflow process to the plurality of solder balls to configure a plurality of solder bumps on the substrate layer. The concentration of the Phosphorus in the solder material is based on target performance characteristic of the substrate having the plurality of solder bumps.

Abstract: An electronic package includes a substrate (110, 310, 510) and a solder resist layer (120, 320, 520) over the substrate. The solder resist layer has a plurality of solder resist openings (121, 321, 521) therein. The electronic package further includes a finish layer (130, 330, 535) in the solder resist openings, an electrically conducting layer (140, 440) in the solder resist openings over the finish layer, and a solder material (150, 810) in the solder resist openings over the electrically conducting layer. The electrically conducting layer electrically connects the solder resist openings in order to enable the electrokinetic deposition of the solder material.

Abstract: A method of providing solder bumps on electrode pads of a microelectronic substrate. The method includes: disposing starter solder portions onto respective ones of the electrode pads; performing a starter reflow comprising reflowing the starter solder portions to form starter solder bumps on respective ones of the electrode pads; disposing respective filler solder portions onto respective ones of the starter solder bumps; and performing a filler reflow comprising reflowing the filler solder portions on respective ones of the starter solder bumps to yield respective final solder bumps on the electrode pads.