Abstract: The present disclosure relates to novel anti-CLEC2D antibodies and related compositions and methods of use thereof. These antibodies are used as therapeutics, and in prognostic and diagnostic applications in various cancers and other diseases.

Abstract: A device comprising a first printed circuit board (PCB); a second printed circuit board (PCB); a first flex board coupled to the first PCB and the second PCB; a first integrated device coupled to the first PCB; a speaker configured to be coupled to the first integrated device; a microphone configured to be coupled to the first integrated device; a second integrated device coupled to the second PCB, wherein the second integrated device is configured to be coupled to the first integrated device through the second PCB, the first flex board and the first PCB; and a power source configured to provide power to the first integrated device and the second integrated device. The first PCB is located between the power source and the first integrated device. The second PCB is located between the power source and the second integrated device.

Abstract: The present disclosure relates to vectors for cloning and expressing genetic material including but not limiting to antibody gene or parts thereof and methods of generating said vectors. Said vectors express the antibody genes in different formats such as Fab or scFv as a part of intertransfer system, intratransfer system or direct cloning and expression in individual display systems. In particular, phage display technology is used to clone and screen potential antibody genes in phagemid which is followed by the transfer of said genes to yeast vector for further screening and identification of lead molecules against antigens. The present vectors have numerous advantages including uniquely designed inserts/expression cassettes resulting in efficient and smooth transfer of clonal population from phage to yeast vectors resulting in efficient library preparation and identification of lead molecules.

Abstract: The present disclosure relates to a method of generating an antibody library, not limiting to a human naïve antibody gene expression library encompassing a pool of nucleic acid sequences derived from a natural antibody repertoire comprising humoral immunity from healthy and genetically diverse human populations. More specifically, the method employs a combination of phage and/or yeast antibody surface display concept which allows to screen large antibody library size and facilitates better folding of antibody structure. The present disclosure also relates to a human naïve antibody library generated by employing the process of the present disclosure, a set of primers employed in the method and application(s) of said antibody library.

Abstract: The present disclosure relates to methods of obtaining cell with disrupted fucosylation and obtaining afucosylated protein. The present disclosure employs the Clustered Regularly Interspaced Short Palindromic Repeats (CRISPR) technology in a protein producing cell line to produce afucosylated protein. The resulting protein, specifically the resulting monoclonal antibody is completely afucosylated and reveals higher degree of antibody dependent cellular cytotoxicity.

Abstract: The present disclosure relates to a method of generating an antibody library, not limiting to a synthetic antibody gene expression library built on pool of consensus nucleic acid sequences by using codon replacement technology. The present disclosure also relates to a synthetic antibody library generated by employing the method of the present disclosure and application(s) of said antibody library.

Abstract: A device that includes a board, a first integrated device coupled to the board, a speaker coupled to the first integrated device, a microphone coupled to the first integrated device and a power source configured to provide power to the first integrated device, the speaker and the microphone. The device has a length of about 2.4 centimeter (cm) or less, and a diameter of about 1.2 centimeter (cm) or less. The first integrated device includes a processor. The device further includes a second integrated device configured to provide wireless communication capabilities. The device further includes a wireless charging circuit to enable wireless charging of the power source.

Abstract: Techniques and structures are provided for manufacturing a flexible PMUT array. In one embodiment, a piezoelectric micromechanical ultrasonic transducer (PMUTs) array comprises a plurality of PMUTs, where each PMUT in the flexible array of PMUTs includes: a first polymer layer configured to support the PMUT, a mechanical layer configured to provide planarization to the PMUT, a first electrode, a second electrode, a piezoelectric layer configured to separate the first electrode and the second electrode, patterns on the first electrode, the piezoelectric material, and the second electrode configured to route electrical signals, and a cavity configured to adjust a frequency response of the PMUT.

Abstract: Methods, systems, computer-readable media, and apparatuses for high density Micro-Electro-Mechanical Systems (MEMS) are presented. In some embodiments, a method for manufacturing a micro-electro-mechanical device on a substrate can comprise etching a release via through a layer of the device. The method can further comprise creating a cavity in the layer of the device using the release via as a conduit to access the desired location of the cavity, the cavity enabling movement of a transducer of the device. The method can then comprise depositing low impedance, electrically conductive material into the release via to form an electrically conductive path through the layer. Finally, the method can comprise electrically coupling the electrically conductive material to an electrode of the transducer.

Abstract: Embodiments of a sensor device and methods for manufacturing the same are disclosed. In one embodiment, a sensor device comprises a piezoelectric micromechanical ultrasonic transducer (PMUT) array configured to transmit and receive ultrasonic signals, where the PMUT array comprises a plurality of PMUTs and the PMUT array is flexible, one or more integrated circuits configured to process the ultrasonic signals, a battery configured to provide power to the PMUT array and the one or more integrated circuits, a coupling material configured to hold the PMUT array, the one or more integrated circuits, and the battery, and a capsule configured to seal the PMUT array, the one or more integrated circuits, the battery and the coupling material within the capsule.

Abstract: The present disclosure relates to methods of obtaining cell with disrupted fucosylation and obtaining afucosylated protein. The present disclosure employs the Clustered Regularly Interspaced Short Palindromic Repeats (CRISPR) technology in a protein producing cell line to produce afucosylated protein. The resulting protein, specifically the resulting monoclonal antibody is completely afucosylated and reveals higher degree of antibody dependent cellular cytotoxicity.

Abstract: Embodiments of a flexible PMUT array and methods for manufacturing the same are disclosed. In one embodiment, a piezoelectric micromechanical ultrasonic transducer (PMUTs) array comprises a plurality of PMUTs, where each PMUT in the flexible array of PMUTs includes: a first polymer layer configured to support the PMUT, a mechanical layer configured to provide planarization to the PMUT, a first electrode, a second electrode, a piezoelectric layer configured to separate the first electrode and the second electrode, patterns on the first electrode, the piezoelectric material, and the second electrode configured to route electrical signals, and a cavity configured to adjust a frequency response of the PMUT.

Abstract: Embodiments of a sensor device and methods for manufacturing the same are disclosed. In one embodiment, a sensor device comprises a piezoelectric micromechanical ultrasonic transducer (PMUT) array configured to transmit and receive ultrasonic signals, where the PMUT array comprises a plurality of PMUTs and the PMUT array is flexible, one or more integrated circuits configured to process the ultrasonic signals, a battery configured to provide power to the PMUT array and the one or more integrated circuits, a coupling material configured to hold the PMUT array, the one or more integrated circuits, and the battery, and a capsule configured to seal the PMUT array, the one or more integrated circuits, the battery and the coupling material within the capsule.

Abstract: Methods, systems, computer-readable media, and apparatuses for high density Micro-Electro-Mechanical Systems (MEMS) are presented. In some embodiments, a method for manufacturing a micro-electro-mechanical device on a substrate can comprise etching a release via through a layer of the device. The method can further comprise creating a cavity in the layer of the device using the release via as a conduit to access the desired location of the cavity, the cavity enabling movement of a transducer of the device. The method can then comprise depositing low impedance, electrically conductive material into the release via to form an electrically conductive path through the layer. Finally, the method can comprise electrically coupling the electrically conductive material to an electrode of the transducer.

Abstract: An integrated device package includes a die and a package substrate. The package substrate includes at least one dielectric layer (e.g., core layer, prepeg layer), a magnetic core in the dielectric layer, a first plurality of interconnects configured to operate as a first protective ring, and a second plurality of interconnects configured to operate as a first inductor. The second plurality of interconnects is positioned in the package substrate to at least partially surround the magnetic core. At least one interconnect from the second plurality of interconnects is also part of the first plurality of interconnects. In some implementations, the first protective ring is a non-contiguous protective ring. In some implementations, the first inductor is a solenoid inductor. In some implementations, the magnetic core includes a carrier, a first magnetic layer, and a second magnetic layer.

Abstract: An integrated device package includes a die and a package substrate. The package substrate includes at least one dielectric layer (e.g., core layer, prepeg layer), a magnetic core in the dielectric layer, a first plurality of interconnects configured to operate as a first protective ring, and a second plurality of interconnects configured to operate as a first inductor. The second plurality of interconnects is positioned in the package substrate to at least partially surround the magnetic core. At least one interconnect from the second plurality of interconnects is also part of the first plurality of interconnects. In some implementations, the first protective ring is a non-contiguous protective ring. In some implementations, the first inductor is a solenoid inductor. In some implementations, the magnetic core includes a carrier, a first magnetic layer, and a second magnetic layer.

Abstract: Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.

Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

Abstract: An oscillator circuit includes an electrical load, a first metal oxide semiconductor (MOS) devise, a second MOS device, and a negative feedback circuit. The electrical load is coupled between a first node and a second node. The first MOS device is coupled between the first node and a third node, and controls a first current flowing from the first node to the third node. The second MOS device is coupled between the second node and a fourth node, and controls a second current flowing from the second node to the fourth node. A positive feedback circuit is formed with the first and second MOS devices. The positive feedback circuit has inputs from the first and second nodes and outputs to the first and second MOS devices. The negative feedback circuit has inputs from the third and fourth nodes and outs to the first and second MOS devices.