Abstract: Embodiments of a sensor device and methods for manufacturing the same are disclosed. In one embodiment, a sensor device comprises a piezoelectric micromechanical ultrasonic transducer (PMUT) array configured to transmit and receive ultrasonic signals, where the PMUT array comprises a plurality of PMUTs and the PMUT array is flexible, one or more integrated circuits configured to process the ultrasonic signals, a battery configured to provide power to the PMUT array and the one or more integrated circuits, a coupling material configured to hold the PMUT array, the one or more integrated circuits, and the battery, and a capsule configured to seal the PMUT array, the one or more integrated circuits, the battery and the coupling material within the capsule.

Abstract: Embodiments of a flexible PMUT array and methods for manufacturing the same are disclosed. In one embodiment, a piezoelectric micromechanical ultrasonic transducer (PMUTs) array comprises a plurality of PMUTs, where each PMUT in the flexible array of PMUTs includes: a first polymer layer configured to support the PMUT, a mechanical layer configured to provide planarization to the PMUT, a first electrode, a second electrode, a piezoelectric layer configured to separate the first electrode and the second electrode, patterns on the first electrode, the piezoelectric material, and the second electrode configured to route electrical signals, and a cavity configured to adjust a frequency response of the PMUT.

Abstract: A biomedical system includes: a medical implant capsule including an outer body, an electric device retained by the outer body, and a power input coupled to the electric device, the medical implant capsule having a length, along an axis, and a width transverse to the axis; and an antenna coupled to the power input and configured to: receive power wirelessly and to deliver the power to the power input; wrap around the medical implant capsule, in a transit state, transverse to the length of the medical implant capsule for a distance greater than the width of the medical implant capsule; and expand to a deployed state, at least part of the antenna being further from the axis in the deployed state than in the transit state.

Abstract: Methods, systems, computer-readable media, and apparatuses for high density Micro-Electro-Mechanical Systems (MEMS) are presented. In some embodiments, a method for manufacturing a micro-electro-mechanical device on a substrate can comprise etching a release via through a layer of the device. The method can further comprise creating a cavity in the layer of the device using the release via as a conduit to access the desired location of the cavity, the cavity enabling movement of a transducer of the device. The method can then comprise depositing low impedance, electrically conductive material into the release via to form an electrically conductive path through the layer. Finally, the method can comprise electrically coupling the electrically conductive material to an electrode of the transducer.

Abstract: An integrated device package includes a die and a package substrate. The package substrate includes at least one dielectric layer (e.g., core layer, prepeg layer), a magnetic core in the dielectric layer, a first plurality of interconnects configured to operate as a first protective ring, and a second plurality of interconnects configured to operate as a first inductor. The second plurality of interconnects is positioned in the package substrate to at least partially surround the magnetic core. At least one interconnect from the second plurality of interconnects is also part of the first plurality of interconnects. In some implementations, the first protective ring is a non-contiguous protective ring. In some implementations, the first inductor is a solenoid inductor. In some implementations, the magnetic core includes a carrier, a first magnetic layer, and a second magnetic layer.

Abstract: An integrated device package includes a die and a package substrate. The package substrate includes at least one dielectric layer (e.g., core layer, prepeg layer), a magnetic core in the dielectric layer, a first plurality of interconnects configured to operate as a first protective ring, and a second plurality of interconnects configured to operate as a first inductor. The second plurality of interconnects is positioned in the package substrate to at least partially surround the magnetic core. At least one interconnect from the second plurality of interconnects is also part of the first plurality of interconnects. In some implementations, the first protective ring is a non-contiguous protective ring. In some implementations, the first inductor is a solenoid inductor. In some implementations, the magnetic core includes a carrier, a first magnetic layer, and a second magnetic layer.

Abstract: Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.

Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

Abstract: An oscillator circuit includes an electrical load, a first metal oxide semiconductor (MOS) devise, a second MOS device, and a negative feedback circuit. The electrical load is coupled between a first node and a second node. The first MOS device is coupled between the first node and a third node, and controls a first current flowing from the first node to the third node. The second MOS device is coupled between the second node and a fourth node, and controls a second current flowing from the second node to the fourth node. A positive feedback circuit is formed with the first and second MOS devices. The positive feedback circuit has inputs from the first and second nodes and outputs to the first and second MOS devices. The negative feedback circuit has inputs from the third and fourth nodes and outs to the first and second MOS devices.

Abstract: A delay cell, a method for generating a delay, and a differential ring oscillator are disclosed. The delay cell provides a stable delay with a low voltage power supply, and has a high power supply rejection ratio. The delay cell generally comprises a first and second input receiver on a first and second branch, respectively, to receive an input to control a current on each branch, each branch includes an output node capacitively coupled to a power supply. Each branch may include a current source coupled between the output node and the power supply and/or a lower limit clamp coupled between the output node and the power supply to maintain an output at the output node above a lower limit. The delay cell may also include a first and a second current diverter coupled to the first and second branch for diverting current on the first and second branch away from the first and second input receiver, respectively.

Abstract: A primary lithium battery particularly adapted for use in self-contained self-powered devices (SSPD) for mobile communication and computing products, such as radio frequency identification tags, PCMCIA cards, and smart cards. The battery has a flexible and compact design, and utilizes a solid polymer electrolyte membrane that preferably has a polyacrylonitrile matrix. Performance of the electrolyte membrane is optimized by controlling the amount of aprotic organic solvents within the membrane within a prescribed range of ratios. In so doing, the performance characteristics of the battery closely approximate that of conventional liquid electrolytes without the safety hazards associated with the risk of liquid electrolyte leakage, and exhibit enhanced performance at sub-ambient temperatures. A further feature is that the battery's cathode is encapsulated within a polymeric matrix that eliminates the exposure hazard posed by lithium intercalation compounds used within the cathode.

Abstract: A tool and process for electroetching metal films or layers on a substrate employs a linear electrode and a linear jet of electrolyte squirted from the electrode. The electrode is slowly scanned over the film by a drive mechanism. The current is preferably intermittent. In one embodiment a single wafer surface (substrate) is inverted and the jet is scanned underneath. In another embodiment wafers are held vertically on opposite sides of a holder and two linear electrodes, oriented horizontally and on opposite sides of the holder, are scanned vertically upward at a rate such that the metal layers are completely removed in one pass. The process is especially adapted for fabricating C4 solder balls with triple seed layers of Ti-W (titanium-tungsten alloy) on a substrate, phased Cr-Cu consisting of 50% chromium (Cr) and 50% copper (Cu), and substantially pure Cu. Solder alloys are through-mask electrodeposited on the Cu layer. The seed layers conduct the plating current.