Patents by Inventor Ravindranath Droopad

Ravindranath Droopad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6432546
    Abstract: A high quality epitaxial layer of monocrystalline Pb(Zr,Ti)O3 can be grown overlying large silicon wafers by first growing an strontium titanate layer on a silicon wafer. The strontium titanate layer is a monocrystalline layer spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: August 13, 2002
    Assignee: Motorola, Inc.
    Inventors: Ramoothy Ramesh, Yu Wang, Jeffrey M. Finder, Kurt Eisenbeiser, Zhiyi Yu, Ravindranath Droopad
  • Publication number: 20020089023
    Abstract: A structure and method for forming a high dielectric constant device structure includes a monocrystalline semiconductor substrate and an insulating layer formed of a metal oxide-nitride such as MnOm−xNx, wherein M is a metallic or semi-metallic element or combination of metallic and/or semi-metallic elements and m and n are integers. Semiconductor devices formed in accordance with the present invention exhibit low leakage current density and improved chemical, thermal, and electrical stability over conventional metal oxides.
    Type: Application
    Filed: January 5, 2001
    Publication date: July 11, 2002
    Applicant: Motorola, Inc.
    Inventors: Zhiyi Yu, Ravindranath Droopad, Corey Overgaard, John Leonard Edwards
  • Publication number: 20020088970
    Abstract: A quantum structure (300) having photo-catalytic properties includes a monocrystalline substrate (302) and a monocrystalline metal oxide layer (308) formed of a material comprising titanium and oxygen and epitaxially grown overlying the substrate. The quantum structure further includes self-assembled quantum dots (312) disposed on the monocrystalline metal oxide layer and formed of a material comprising copper and oxygen.
    Type: Application
    Filed: January 5, 2001
    Publication date: July 11, 2002
    Applicant: Motorola, Inc.
    Inventors: Zhiyi Yu, Ravindranath Droopad, Jerald A. Hallmark
  • Publication number: 20020074624
    Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: February 19, 2002
    Publication date: June 20, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Jamal Ramdani, Ravindranath Droopad, Lyndee L. Hilt, Kurt William Eisenbeiser
  • Publication number: 20020072253
    Abstract: A method of removing an amorphous oxide from a surface of a monocrystalline substrate is provided. The method includes depositing a passivation material overlying the amorphous oxide. The monocrystalline substrate is then heated so that the amorphous oxide layer decomposes into at least one volatile species that is liberated from the surface.
    Type: Application
    Filed: October 26, 2001
    Publication date: June 13, 2002
    Applicant: MOTOROLA, INC.
    Inventors: John L. Edwards, Yi Wei, Dirk C. Jordan, Xiaoming Hu, James Bradley Craigo, Ravindranath Droopad, Zhiyi Yu, Alexander A. Demkov
  • Patent number: 6392257
    Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: May 21, 2002
    Assignee: Motorola Inc.
    Inventors: Jamal Ramdani, Ravindranath Droopad, Lyndee L. Hilt, Kurt William Eisenbeiser
  • Publication number: 20020047123
    Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: November 7, 2001
    Publication date: April 25, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Jamal Ramdani, Ravindranath Droopad, Lyndee L. Hilt
  • Publication number: 20020047143
    Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: November 7, 2001
    Publication date: April 25, 2002
    Applicant: MOTOROLA, INC.
    Inventors: Jamal Ramdani, Ravindranath Droopad, Lyndee L. Hilt
  • Publication number: 20020009612
    Abstract: A high quality epitaxial layer of monocrystalline Pb(Mg,Nb)O3—PbTiO3 or Pb(Mg1-x-Nbx)O3—PbTiO3 can be grown overlying large silicon wafers by first growing an strontium titanate layer on a silicon wafer. The strontium titanate layer is a monocrystalline layer spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 24, 2002
    Applicant: Motorola, Inc.
    Inventors: Ramamoorthy Ramesh, Yu Wang, Jeffrey M. Finder, Zhiyi Yu, Ravindranath Droopad, Kurt Eisenbeiser
  • Publication number: 20020000584
    Abstract: High quality epitaxial layers of conductive monocrystalline materials can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer(24) on a silicon wafer (22). The accommodating buffer layer (24) is a layer of monocrystalline material spaced apart from the silicon wafer (22) by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer (28) dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer (24).
    Type: Application
    Filed: January 5, 2001
    Publication date: January 3, 2002
    Applicant: Motorola, Inc.
    Inventors: Kurt W. Eisenbeiser, Ravindranath Droopad, Zhiyi Yu
  • Patent number: 6319730
    Abstract: A method for fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12); forming amorphous silicon dioxide (14) on the surface (12) of the silicon substrate (10); providing a metal oxide (18) on the amorphous silicon dioxide (14); heating the semiconductor structure to form an interface comprising a seed layer (20) adjacent the surface (12) of the silicon substrate (10); and forming one or more layers of a high dielectric constant oxide (22) on the seed layer (20).
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: November 20, 2001
    Assignee: Motorola, Inc.
    Inventors: Jamal Ramdani, Ravindranath Droopad, Zhiyi Yu
  • Publication number: 20010023660
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
    Type: Application
    Filed: June 4, 2001
    Publication date: September 27, 2001
    Applicant: MOTOROLA, INC.
    Inventors: Zhiyi Yu, Ravindranath Droopad, Corey Daniel Overgaard, Jamal Ramdani, Jay A. Curless, Jerald A. Hallmark, William J. Ooms, Jun Wang
  • Patent number: 6291319
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, nitrogen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, nitrogen, and a metal in the form MSiN2, where M is a metal. In a second embodiment, the interface comprises an atomic layer of silicon, a metal, and a mixture of nitrogen and oxygen in the form MSi[N1−Ox]2, where M is a metal and X is 0≦X<1.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: September 18, 2001
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Yu, Jun Wang, Ravindranath Droopad, Jamal Ramdani
  • Publication number: 20010013313
    Abstract: An apparatus (100) and method (800) for forming high quality epitaxial layers of monocrystalline materials grown overlying monocrystalline substrates (310) such as large silicon wafers is provided. The apparatus (100) includes at least two deposition chambers (110) and (140) that are coupled together. The first chamber (110) is used to form an accommodating buffer layer (320) on the substrate (310) and the second (140) is used to form a layer of monocrystalline material (330) overlying the accommodating buffer layer (320).
    Type: Application
    Filed: February 9, 2001
    Publication date: August 16, 2001
    Applicant: Motorola, Inc.
    Inventors: Ravindranath Droopad, Zhiyi Yu, William J. Ooms, Jamal Ramdani
  • Patent number: 6270568
    Abstract: A method for fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12); forming an interface including a seed layer (18) adjacent to the surface (12) of the silicon substrate (10), forming a buffer layer (20) utilizing molecular oxygen; and forming one or more layers of a high dielectric constant oxide (22) on the buffer layer (20) utilizing activated oxygen.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: August 7, 2001
    Assignee: Motorola, Inc.
    Inventors: Ravindranath Droopad, Zhiyi Yu, Jamal Ramdani
  • Patent number: 6241821
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: June 5, 2001
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Yu, Ravindranath Droopad, Corey Daniel Overgaard, Jamal Ramdani, Jay A. Curless, Jerald A. Hallmark, William J. Ooms, Jun Wang
  • Patent number: 6224669
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: May 1, 2001
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Yi, Ravindranath Droopad, Corey Daniel Overgaard, Jamal Ramdani, Jay A. Curless, Jerald A. Hallmark, William J. Ooms, Jun Wang
  • Patent number: 6159834
    Abstract: A gate quality oxide-compound semiconductor structure (10) is formed by the steps of providing a III-V compound semiconductor wafer structure (13) with an atomically ordered and chemically clean semiconductor surface in an ultra high vacuum (UHV) system (20), directing a molecular beam (26) of gallium oxide onto the surface of the wafer structure to initiate the oxide deposition, and providing a second beam (28) of atomic oxygen to form a Ga.sub.2 O.sub.3 layer (14) with low defect density on the surface of the wafer structure. The second beam of atomic oxygen is supplied upon completion of the first 1-2 monolayers of Ga.sub.2 O.sub.3. The molecular beam of gallium oxide is provided by thermal evaporation from a crystalline Ga.sub.2 O.sub.3 or gallate source, and the atomic beam of oxygen is provided by either RF or microwave plasma discharge, thermal dissociation, or a neutral electron stimulated desorption atom source.
    Type: Grant
    Filed: February 12, 1998
    Date of Patent: December 12, 2000
    Assignee: Motorola, Inc.
    Inventors: Zhiyi (Jimmy) Yu, Matthias Passlack, Brian Bowers, Corey Daniel Overgaard, Ravindranath Droopad, Jonathan Kwadwo Abrokwah
  • Patent number: 6022410
    Abstract: A method of forming a thin silicide layer on a silicon substrate 12 including heating the surface of the substrate to a temperature of approximately 500.degree. C. to 750.degree. C. and directing an atomic beam of silicon 18 and an atomic beam of an alkaline-earth metal 20 at the heated surface of the substrate in a molecular beam epitaxy chamber at a pressure in a range below 10.sup.-9 Torr. The silicon to alkaline-earth metal flux ratio is kept constant (e.g. Si/Ba flux ratio is kept at approximately 2:1) so as to form a thin alkaline-earth metal silicide layer (e.g. BaSi.sub.2) on the surface of the substrate. The thickness is determined by monitoring in situ the surface of the single crystal silicide layer with RHEED and terminating the atomic beam when the silicide layer is a selected submonolayer to one monolayer thick.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: February 8, 2000
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Yu, Jun Wang, Ravindranath Droopad, Daniel S. Marshall, Jerald A. Hallmark, Jonathan K. Abrokwah