Patents by Inventor Raymond S. Tetrick
Raymond S. Tetrick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11042297Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: GrantFiled: May 20, 2019Date of Patent: June 22, 2021Assignee: Intel CorporationInventors: Blaise Fanning, Mark A. Schmisseur, Raymond S. Tetrick, Robert J. Royer, Jr., David B. Minturn, Shane Matthews
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Patent number: 10817201Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: GrantFiled: March 25, 2019Date of Patent: October 27, 2020Assignee: Intel CorporationInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Publication number: 20190339869Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: ApplicationFiled: May 20, 2019Publication date: November 7, 2019Inventors: Blaise FANNING, Mark A. SCHMISSEUR, Raymond S. TETRICK, Robert J. ROYER, JR., David B. MINTURN, Shane MATTHEWS
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Publication number: 20190286356Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: ApplicationFiled: March 25, 2019Publication date: September 19, 2019Inventors: Blaise FANNING, Shekoufeh QAWAMI, Raymond S. TETRICK, Frank T. HADY
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Patent number: 10296217Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: GrantFiled: June 9, 2017Date of Patent: May 21, 2019Assignee: Intel CorporationInventors: Blaise Fanning, Mark A. Schmisseur, Raymond S. Tetrick, Robert J. Royer, Jr., David B. Minturn, Shane Matthews
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Patent number: 10241710Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: GrantFiled: June 30, 2017Date of Patent: March 26, 2019Assignee: Intel CorporationInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Publication number: 20170336978Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: ApplicationFiled: June 9, 2017Publication date: November 23, 2017Applicant: Intel CorporationInventors: BLAISE FANNING, MARK A. SCHMISSEUR, RAYMOND S. TETRICK, ROBERT J. ROYER, JR., DAVID B. MINTURN, SHANE MATTHEWS
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Publication number: 20170337009Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: ApplicationFiled: June 30, 2017Publication date: November 23, 2017Inventors: Blaise FANNING, Shekoufeh QAWAMI, Raymond S. Tetrick, Frank T. HADY
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Patent number: 9703502Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: GrantFiled: July 19, 2016Date of Patent: July 11, 2017Assignee: Intel CorporationInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Patent number: 9678666Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: GrantFiled: July 1, 2015Date of Patent: June 13, 2017Assignee: INTEL CORPORATIONInventors: Blaise Fanning, Mark A. Schmisseur, Raymond S. Tetrick, Robert J. Royer, Jr., David B. Minturn, Shane Matthews
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Publication number: 20170075616Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: ApplicationFiled: July 19, 2016Publication date: March 16, 2017Applicant: Intel CorporationInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Patent number: 9430151Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: GrantFiled: October 8, 2015Date of Patent: August 30, 2016Assignee: Intel CorporationInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Publication number: 20160110106Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.Type: ApplicationFiled: October 8, 2015Publication date: April 21, 2016Applicant: Intel CorporationInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Publication number: 20160034196Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: ApplicationFiled: July 1, 2015Publication date: February 4, 2016Applicant: Intel CorporationInventors: Blaise FANNING, Mark A. SCHMISSEUR, Raymond S. TETRICK, Robert J. ROYER, JR., David B. MINTURN, Shane MATTHEWS
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Patent number: 9190124Abstract: Embodiments of a method, device, and system for implementing multi-level memory with direct access are disclosed. In one embodiment, the method includes designating an amount of a non-volatile random access memory (NVRAM) in a computer system to be utilized as a memory alternative for a dynamic random access memory (DRAM). The method continues by designating a second amount of the NVRAM to be utilized as a storage alternative for a mass storage device. Then the method re-designates at least a first portion of the first amount of NVRAM from the memory alternative designation to the storage alternative designation during operation of the computer system. Finally, the method re-designates at least a first portion of the second amount of NVRAM from the storage alternative designation to the memory alternative designation during operation of the computer system.Type: GrantFiled: December 29, 2011Date of Patent: November 17, 2015Assignee: INTEL CORPORATIONInventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Patent number: 9098402Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: GrantFiled: December 21, 2012Date of Patent: August 4, 2015Assignee: INTEL CORPORATIONInventors: Blaise Fanning, Mark A. Schmisseur, Raymond S. Tetrick, Robert J. Royer, Jr., David B. Minturn, Shane Matthews
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Publication number: 20140181365Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.Type: ApplicationFiled: December 21, 2012Publication date: June 26, 2014Inventors: BLAISE FANNING, MARK A. SCHMISSEUR, RAYMOND S. TETRICK, ROBERT J. ROYER, JR., DAVID B. MINTURN, SHANE MATTHEWS
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Publication number: 20130339572Abstract: Embodiments of a method, device, and system for implementing multi-level memory with direct access are disclosed. In one embodiment, the method includes designating an amount of a non-volatile random access memory (NVRAM) in a computer system to be utilized as a memory alternative for a dynamic random access memory (DRAM). The method continues by designating a second amount of the NVRAM to be utilized as a storage alternative for a mass storage device. Then the method re-designates at least a first portion of the first amount of NVRAM from the memory alternative designation to the storage alternative designation during operation of the computer system. Finally, the method re-designates at least a first portion of the second amount of NVRAM from the storage alternative designation to the memory alternative designation during operation of the computer system.Type: ApplicationFiled: December 29, 2011Publication date: December 19, 2013Inventors: Blaise Fanning, Shekoufeh Qawami, Raymond S. Tetrick, Frank T. Hady
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Patent number: 7783809Abstract: Architectures and techniques that allow legacy pin functionality to be replaced with a “virtual wire” that may communicate information that would otherwise be communicated by a wired interface. A message may be passed between a system controller and a processor that includes a virtual wire value and a virtual wire change indicator. The virtual wire value may include a signal corresponding to one or more pins that have been eliminated from the physical interface and the virtual wire change value may include an indication of whether the virtual wire value has changed. The combination of the virtual wire value and the virtual wire change indicator may allow multiple physical pins to be replaced by message values.Type: GrantFiled: June 30, 2005Date of Patent: August 24, 2010Assignee: Intel CorporationInventors: Keshavan K. Tiruvallur, David I. Poisner, Herbert H. J. Hum, Frank Binns, David L. Hill, Robert J. Greiner, Raymond S. Tetrick
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Patent number: 7360027Abstract: An arrangement is provided for an external agent to initiate data prefetches from a system memory to a cache associated with a target processor, which needs the data to execute a program, in a computing system. When the external agent has data, it may create and issue a prefetch directive. The prefetch directive may be sent along with system interconnection transactions or sent as a separate transaction to devices including the target processor in the system. When receiving and recognizing the prefetch directive, a hardware prefetcher associated with the target processor may issue a request to the system memory to prefetch data to the cache. The target processor can access data in the cache more efficiently than it accesses data in the system memory. Some pre-processing may also be associated with the data prefetch.Type: GrantFiled: October 15, 2004Date of Patent: April 15, 2008Assignee: Intel CorporationInventors: Ramakrishna Huggahalli, Brannon J. Batson, Raymond S. Tetrick, Robert G. Blankenship