Abstract: In one embodiment, a method of forming a vertical transistor includes forming a layer comprising a semiconductor material above a substrate, defining three dimensional (3D) structures in the layer, forming a second region in at least one vertical sidewall of each 3D structure, and forming an isolation region between the 3D structures. In another embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of 3D structures above the substrate, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure.

Abstract: According to one embodiment, an apparatus includes a substrate, and at least one three dimensional (3D) structure above the substrate. The substrate and the 3D structure each include a semiconductor material. The 3D structure also includes: a first region having a first conductivity type, and a second region coupled to a portion of at least one vertical sidewall of the 3D structure.

Abstract: In one embodiment, an apparatus includes: a first layer including a n+ dopant or p+ dopant; an intrinsic layer formed above the first layer, the intrinsic layer including a planar portion and pillars extending above the planar portion, cavity regions being defined between the pillars; and a second layer deposited on a periphery of the pillars thereby forming coated pillars, the second layer being substantially absent on the planar portion of the intrinsic layer between the coated pillars. The second layer includes an n+ dopant when the first layer includes a p+ dopant. The second layer includes a p+ dopant when the first layer includes an n+ dopant. The apparatus includes a neutron sensitive material deposited between the coated pillars and above the planar portion of the intrinsic layer. In additional embodiments, an upper portion of each of the pillars includes a same type of dopant as the second layer.

Abstract: In one embodiment, an apparatus includes: a first layer including a n+ dopant or p+ dopant; an intrinsic layer formed above the first layer, the intrinsic layer including a planar portion and pillars extending above the planar portion, cavity regions being defined between the pillars; and a second layer deposited on a periphery of the pillars thereby forming coated pillars, the second layer being substantially absent on the planar portion of the intrinsic layer between the coated pillars. The second layer includes an n+ dopant when the first layer includes a p+ dopant. The second layer includes a p+ dopant when the first layer includes an n+ dopant. The apparatus includes a neutron sensitive material deposited between the coated pillars and above the planar portion of the intrinsic layer. In additional embodiments, an upper portion of each of the pillars includes a same type of dopant as the second layer.

Abstract: In one embodiment, an apparatus includes a three dimensional structure comprising a semiconductor material, and at least one thin film in contact with at least one exterior surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the three dimensional structure. In another embodiment, a method includes forming a three dimensional structure comprising a semiconductor material, and depositing at least one thin film on at least one surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the structure.

Abstract: According to one embodiment, an apparatus for detecting neutrons includes an array of pillars, wherein each of the pillars comprises a rounded cross sectional shape where the cross section is taken perpendicular to a longitudinal axis of the respective pillar, a cavity region between each of the pillars, and a neutron sensitive material located in each cavity region.

Abstract: A method of fabricating a mixed ionic-electronic conductor (e.g. TlBr)-based radiation detector having halide-treated surfaces and associated methods of fabrication, which controls polarization of the mixed ionic-electronic MIEC material to improve stability and operational lifetime.

Abstract: According to one embodiment, a product includes an array of three dimensional structures, where each of the three dimensional structure includes a semiconductor material; a cavity region between each of the three dimensional structures; and a first material in contact with at least one surface of each of the three dimensional structures, where the first material is configured to provide high energy particle and/or ray emissions.

Abstract: Three-dimensional boron particle loaded thermal neutron detectors utilize neutron sensitive conversion materials in the form of nano-powders and micro-sized particles, as opposed to thin films, suspensions, paraffin, etc. More specifically, methods to infiltrate, intersperse and embed the neutron nano-powders to form two-dimensional and/or three-dimensional charge sensitive platforms are specified. The use of nano-powders enables conformal contact with the entire charge-collecting structure regardless of its shape or configuration.

Abstract: In one embodiment, an apparatus includes a three dimensional structure comprising a semiconductor material, and at least one thin film in contact with at least one exterior surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the three dimensional structure. In another embodiment, a method includes forming a three dimensional structure comprising a semiconductor material, and depositing at least one thin film on at least one surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the structure.

Abstract: Methods for manufacturing solid-state thermal neutron detectors with simultaneous high thermal neutron detection efficiency (>50%) and neutron to gamma discrimination (>104) are provided. A structure is provided that includes a p+ region on a first side of an intrinsic region and an n+ region on a second side of the intrinsic region. The thickness of the intrinsic region is minimized to achieve a desired gamma discrimination factor of at least 1.0E+04. Material is removed from one of the p+ region or the n+ region and into the intrinsic layer to produce pillars with open space between each pillar. The open space is filed with a neutron sensitive material. An electrode is placed in contact with the pillars and another electrode is placed in contact with the side that is opposite of the intrinsic layer with respect to the first electrode.

Abstract: Three-dimensional boron particle loaded thermal neutron detectors utilize neutron sensitive conversion materials in the form of nano-powders and micro-sized particles, as opposed to thin films, suspensions, paraffin, etc. More specifically, methods to infiltrate, intersperse and embed the neutron nano-powders to form two-dimensional and/or three-dimensional charge sensitive platforms are specified. The use of nano-powders enables conformal contact with the entire charge-collecting structure regardless of its shape or configuration.

Abstract: A method of fabricating a mixed ionic-electronic conductor (e.g. TlBr)-based radiation detector having halide-treated surfaces and associated methods of fabrication, which controls polarization of the mixed ionic-electronic MIEC material to improve stability and operational lifetime.

Abstract: Methods for fabricating three-dimensional PIN structures having conformal electrodes are provided, as well as the structures themselves. The structures include a first layer and an array of pillars with cavity regions between the pillars. A first end of each pillar is in contact with the first layer. A segment is formed on the second end of each pillar. The cavity regions are filled with a fill material, which may be a functional material such as a neutron sensitive material. The fill material covers each segment. A portion of the fill material is etched back to produce an exposed portion of the segment. A first electrode is deposited onto the fill material and each exposed segment, thereby forming a conductive layer that provides a common contact to each the exposed segment. A second electrode is deposited onto the first layer.

Abstract: Methods for manufacturing solid-state thermal neutron detectors with simultaneous high thermal neutron detection efficiency (>50%) and neutron to gamma discrimination (>104) are provided. A structure is provided that includes a p+ region on a first side of an intrinsic region and an n+ region on a second side of the intrinsic region. The thickness of the intrinsic region is minimized to achieve a desired gamma discrimination factor of at least 1.0E+04. Material is removed from one of the p+ region or the n+ region and into the intrinsic layer to produce pillars with open space between each pillar. The open space is filed with a neutron sensitive material. An electrode is placed in contact with the pillars and another electrode is placed in contact with the side that is opposite of the intrinsic layer with respect to the first electrode.

Abstract: In one embodiment, a system comprises a semiconductor gamma detector material and a hole blocking layer adjacent the gamma detector material, the hole blocking layer resisting passage of holes therethrough. In another embodiment, a system comprises a semiconductor gamma detector material, and an electron blocking layer adjacent the gamma detector material, the electron blocking layer resisting passage of electrons therethrough, wherein the electron blocking layer comprises undoped HgCdTe. In another embodiment, a method comprises forming a hole blocking layer adjacent a semiconductor gamma detector material, the hole blocking layer resisting passage of holes therethrough. Additional systems and methods are also presented.

Abstract: Methods for fabricating three-dimentional PIN structures having conformal electrodes are provided, as well as the structures themselves. The structures include a first layer and an array of pillars with cavity regions between the pillars. A first end of each pillar is in contact with the first layer. A segment is formed on the second end of each pillar. The cavity regions are filled with a fill material, which may be a functional material such as a neutron sensitive material. The fill material covers each segment. A portion of the fill material is etched back to produce an exposed portion of the segment. A first electrode is deposited onto the fill material and each exposed segment, thereby forming a conductive layer that provides a common contact to each the exposed segment. A second electrode is deposited onto the first layer.

Abstract: In one embodiment, a system comprises a semiconductor gamma detector material and a hole blocking layer adjacent the gamma detector material, the hole blocking layer resisting passage of holes therethrough. In another embodiment, a system comprises a semiconductor gamma detector material, and an electron blocking layer adjacent the gamma detector material, the electron blocking layer resisting passage of electrons therethrough, wherein the electron blocking layer comprises undoped HgCdTe. In another embodiment, a method comprises forming a hole blocking layer adjacent a semiconductor gamma detector material, the hole blocking layer resisting passage of holes therethrough. Additional systems and methods are also presented.