Abstract: A data storage device includes a memory device and a controller coupled to the memory device. When a program operation occurs, the controller is configured to determine a decode time for the data prior to programming the data to the memory device. The decode time determined by decoding the encoded data. A number of program loop cycles is determined using the decode time. The data is programmed to the memory device with the number of program loop cycles determined.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. When a program operation occurs, the controller is configured to determine a decode time for the data prior to programming the data to the memory device. The decode time determined by decoding the encoded data. A number of program loop cycles is determined using the decode time. The data is programmed to the memory device with the number of program loop cycles determined.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive read requests from a host device. When a read request is received corresponding to one or more pages from a first plane and one or more pages from a second plane, the controller is configured to determine a decode time for the pages of the first plane and the pages of the second plane. Based on the decode times for pages of the first plane and pages of the second page, pages of the first plane that have a similar decode time to pages of the second plane are read in parallel.

Abstract: The present disclosure generally relates to improving data transfer speed. A data storage device includes both a controller and a memory device. The controller provides instructions regarding read and/or write commands to the memory device through the use of control lines. The data to be written/read is transferred between the controller and the memory device along data lines. The control lines typically are not used during data transfer. During data transfer, the control lines can be used to increase data transfer speed by utilizing the otherwise idle control lines for data transfer in addition to the data lines. Hence, data transfer speed is increased by using not only the data lines, but additionally the control lines. Once the data transfer is complete, the control lines return to their legacy function.

Abstract: The present disclosure generally relates to efficiently reading data during a suspend resume operation. Once writing is suspended, and prior to reading the data, a determination is made regarding whether there are multiple reads of the same page type. If there are multiple reads of the same page type, those reads are paired up so that the two reads of the same page type can occur from two planes in parallel. If two different pages types are read in parallel on the two planes, the slowest page type will determine the duration of the read. By grouping reads of the same page type and proceeding with the read, the disruption during suspend resume operations is minimized.

Abstract: The present disclosure generally relates to efficient reading that avoids line discharging between reads. When multiple read commands are present for a common word line, those read commands can be arranged from lowest sensing voltage to highest sensing voltage. Because the sensing voltage increases for each read command, and the read commands are for the same word line, the normal discharge that occurs after the sensing in the read operation can be eliminated until the highest sensing voltage read command has been executed. At that point, the discharging can occur. Because a discharge does not occur after each sensing in the read operation, the read efficiency is improved.

Abstract: The present disclosure generally relates to efficiently reading data during a suspend resume operation. Once writing is suspended, and prior to reading the data, a determination is made regarding whether there are multiple reads of the same page type. If there are multiple reads of the same page type, those reads are paired up so that the two reads of the same page type can occur from two planes in parallel. If two different pages types are read in parallel on the two planes, the slowest page type will determine the duration of the read. By grouping reads of the same page type and proceeding with the read, the disruption during suspend resume operations is minimized.

Abstract: The present disclosure uses a previously written version of the current data being read as input to a decoder, to increase the probability of reading a correct value from a cell. When the current version of the data is being read by the SSD from a NAND, the data is read as a hard-bit. Using header information, the SSD reads a previously written version of the data as soft-bits. A decoder uses the hard-bits and soft-bits to determine the value of a data bit from a cell. As the cell values from a previously written version of the data are used as soft-bits, the probability that the decoder will return the proper value for the cell is increased.

Abstract: The present disclosure generally relates to enhanced write performance by taking into consideration user write performance preferences as well as enhanced post write read (EPWR) scheduling. The user provides the write performance preferences to the data storage device. When a write operation happens, the data storage device checks the write performance preference for the current LBA as well as the write performance preference for the previous LBA. The data storage device will also check whether the current word line is scheduled for EPWR. Based upon the write performance preferences for the LBAs and the EPWR scheduling, the data can be written out of order to meet the user's write performance preferences. If the data is written out of order, the flash translation layer (FLT) is informed of the switch.

Abstract: Enhanced error correction for data stored in storage devices are presented herein. A storage controller retrieves an initial encoded data segment stored on a storage media, computes information relating to errors resultant from decoding the initial encoded data segment, and stores the information in a cache. The storage controller retrieves subsequent encoded data segments stored on the storage media, augments a decoder using at least the information retrieved from the cache, and decodes the subsequent encoded data with the decoder to produce resultant data.

Abstract: An apparatus and method are described to determine line functionality between two electrical circuits to enable the line to run at a maximum frequency without deleterious conditions occurring from cross-talk effects.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for distributed program operation. One apparatus includes a memory module comprising non-volatile memory. Here, the memory module is configured to program a page of non-volatile memory with a first number of program cycles and indicate (e.g., to a host) that the page is partially programmed. The memory module is also configured to program the page with a second number of program cycles after a predetermined time, wherein the memory module performs one or more other storage operations during the predetermined time, and indicate (e.g., to the host) that the page is fully programmed.

Abstract: An apparatus includes one or more processors configured to execute instructions to generate a plurality of event results that includes a first event result and a second event result. The apparatus further includes a first buffer coupled to the one or more processors and a second buffer coupled to the first buffer. The first buffer is configured to store the plurality of event results. The apparatus further includes a circuit coupled to the first buffer. The first buffer is further configured to provide the first event result to the second buffer in response to detection by the circuit of a failure condition associated with the first event result.

Abstract: Enhanced error correction for data stored in storage devices are presented herein. A storage controller retrieves an initial encoded data segment stored on a storage media, computes information relating to errors resultant from decoding the initial encoded data segment, and stores the information in a cache. The storage controller retrieves subsequent encoded data segments stored on the storage media, augments a decoder using at least the information retrieved from the cache, and decodes the subsequent encoded data with the decoder to produce resultant data.

Abstract: An apparatus includes an event message generator configured to generate an event message. The apparatus further includes a filter circuit configured to receive the event message and to send a first portion of the event message to a destination device. The filter circuit is further configured to selectively send a second portion of the event message to the destination device at least partially based on an event traffic load associated with the destination device.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for distributed program operation. One apparatus includes a non-volatile storage controller that identifies a threshold number of bit flips that can be corrected in an amount of read data and a memory die comprising a plurality of non-volatile memory cells. Here, the memory die receives the threshold number of bit flips from the non-volatile storage controller, programs data to a set of the non-volatile memory cells over a first number of program loop cycles, and programs the data to the set of non-volatile memory cells over an additional number of program loop cycles in response to the amount of bit flips in the set of memory cells exceeding the threshold number of bit flips.

Abstract: A method for elimination of crosstalk effects in a non-volatile storage is disclosed, having steps of identifying at least one line connected to the non-volatile storage that causes crosstalk effects to another line connected to the non-volatile storage, sending a command to the non-volatile storage to replace the at least one line causing crosstalk effects, selecting at least one line to replace the at least one line causing crosstalk effects with a spare line and replacing the at least one line causing crosstalk effects with the spare line.

Abstract: An apparatus and method are described to determine line functionality between two electrical circuits to enable the line to run at a maximum frequency without deleterious conditions occurring from cross-talk effects.

Abstract: A method for elimination of crosstalk effects in a non-volatile storage is disclosed, having steps of identifying at least one line connected to the non-volatile storage that causes crosstalk effects to another line connected to the non-volatile storage, sending a command to the non-volatile storage to replace the at least one line causing crosstalk effects, selecting at least one line to replace the at least one line causing crosstalk effects with a spare line and replacing the at least one line causing crosstalk effects with the spare line.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for distributed program operation. One apparatus includes a memory module comprising non-volatile memory. Here, the memory module is configured to program a page of non-volatile memory with a first number of program cycles and indicate (e.g., to a host) that the page is partially programmed. The memory module is also configured to program the page with a second number of program cycles after a predetermined time, wherein the memory module performs one or more other storage operations during the predetermined time, and indicate (e.g., to the host) that the page is fully programmed.