Patents by Inventor Rei Hashimoto

Rei Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200176953
    Abstract: A quantum cascade laser of an embodiment includes a semiconductor stacked body in which a ridge waveguide is provided. The semiconductor stacked body includes an active layer including a quantum well region including a layer including Al; and the active layer emits laser light. The layer that includes Al includes first regions, and a second region interposed between the first regions; the first region includes Al oxide and reaches a prescribed depth inward from an outer edge of the active layer along a direction parallel to a surface of the active layer in a cross section orthogonal to the optical axis; and the second region does not include Al oxide.
    Type: Application
    Filed: December 3, 2019
    Publication date: June 4, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rei Hashimoto, Shinji Saito, Tomohiro Takase, Tsutomu Kakuno, Yuichiro Yamamoto, Kei Kaneko
  • Patent number: 10630059
    Abstract: A surface emitting quantum cascade laser includes an active layer and a first semiconductor layer. The active layer includes a plurality of quantum well layers and is capable of emitting laser light by intersubband transition. The first surface includes an internal region and an outer peripheral region. Grating pitch of the first pits is m times grating pitch of the second pits. The outer peripheral region surrounds the internal region. A first planar shape of an opening end of the first pit is asymmetric with respect to a line passing through barycenter of the first planar shape and is parallel to at least one side of the first two-dimensional grating. A second planar shape of an opening end of the second pit is symmetric with respect to each of lines passing through barycenter of the second planar shape and is parallel to either side of the second two-dimensional grating.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: April 21, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji Saito, Tsutomu Kakuno, Rei Hashimoto, Kei Kaneko, Yasunobu Kai
  • Publication number: 20200006922
    Abstract: A surface emitting quantum cascade laser includes an active layer and a first semiconductor layer. The active layer includes a plurality of quantum well layers and is capable of emitting laser light by intersubband transition. The first surface includes an internal region and an outer peripheral region. Grating pitch of the first pits is m times grating pitch of the second pits. The outer peripheral region surrounds the internal region. A first planar shape of an opening end of the first pit is asymmetric with respect to a line passing through barycenter of the first planar shape and is parallel to at least one side of the first two-dimensional grating. A second planar shape of an opening end of the second pit is symmetric with respect to each of lines passing through barycenter of the second planar shape and is parallel to either side of the second two-dimensional grating.
    Type: Application
    Filed: August 12, 2019
    Publication date: January 2, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji SAITO, Tsutomu KAKUNO, Rei HASHIMOTO, Kei KANEKO, Yasunobu KAI
  • Patent number: 10490977
    Abstract: A surface-emitting quantum cascade laser of an embodiment comprises a substrate, an active layer, and a photonic crystal layer. The active layer has optical nonlinearity, and is capable of emitting a first and a second infrared laser light. The photonic crystal layer includes a first and a second region. The rectangular grating of the first region is orthogonal to the rectangular grating of the second region. The first infrared laser light has a wavelength corresponding to a maximum gain outside a first photonic bandgap in a direction parallel to a first side of two sides constituting the rectangular grating. The second infrared laser light has a wavelength corresponding to a maximum gain outside a second photonic bandgap in a direction parallel to a second side of the two sides of the rectangular grating.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: November 26, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rei Hashimoto, Shinji Saito, Yuichiro Yamamoto, Tsutomu Kakuno, Kei Kaneko, Tomohiro Takase
  • Patent number: 10490979
    Abstract: A substrate including a photonic crystal has a compound semiconductor, dielectric layers, and a first semiconductor layer. The dielectric layers are provided on a surface of the compound semiconductor substrate and disposed at each grating point of a two-dimensional diffraction grating, each of the dielectric layers having an asymmetric shape in relation to at least one edge of the two-dimensional diffraction grating and having a refractive index lower than a refractive index of the compound semiconductor substrate. The first semiconductor layer includes a flat first face covering the dielectric layers and the surface of the compound semiconductor substrate, a layer constituting the first face containing a material capable of being lattice matched to a material constituting the compound semiconductor substrate.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: November 26, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Shinji Saito, Tsutomu Kakuno, Kei Kaneko, Yasunobu Kai, Naotada Okada
  • Patent number: 10447012
    Abstract: A surface-emitting quantum cascade laser of an embodiment includes a semiconductor stacked body, an upper electrode, and a lower electrode. The semiconductor stacked body includes an active layer that includes a quantum well layer and emits infrared laser light, a first semiconductor layer that includes a photonic crystal layer in which pit parts constitute a rectangular grating, and a second semiconductor layer. The upper electrode is provided on the first semiconductor layer. The lower electrode is provided on a lower surface of a region of the second semiconductor layer overlapping at least the upper electrode. The photonic crystal layer is provided on the upper surface side of the first semiconductor layer. In plan view, the semiconductor stacked body includes a surface-emitting region including the photonic crystal layer and a current injection region. The upper electrode is provided on the current injection region.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: October 15, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji Saito, Tomohiro Takase, Rei Hashimoto, Tsutomu Kakuno
  • Patent number: 10424899
    Abstract: A surface emitting quantum cascade laser includes an active layer and a first semiconductor layer. The active layer includes a plurality of quantum well layers and is capable of emitting laser light by intersubband transition. The first surface includes an internal region and an outer peripheral region. Grating pitch of the first pits is m times grating pitch of the second pits. The outer peripheral region surrounds the internal region. A first planar shape of an opening end of the first pit is asymmetric with respect to a line passing through barycenter of the first planar shape and is parallel to at least one side of the first two-dimensional grating. A second planar shape of an opening end of the second pit is symmetric with respect to each of lines passing through barycenter of the second planar shape and is parallel to either side of the second two-dimensional grating.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: September 24, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji Saito, Tsutomu Kakuno, Rei Hashimoto, Kei Kaneko, Yasunobu Kai
  • Publication number: 20190199064
    Abstract: A substrate including a photonic crystal has a compound semiconductor, dielectric layers, and a first semiconductor layer. The dielectric layers are provided on a surface of the compound semiconductor substrate and disposed at each grating point of a two-dimensional diffraction grating, each of the dielectric layers having an asymmetric shape in relation to at least one edge of the two-dimensional diffraction grating and having a refractive index lower than a refractive index of the compound semiconductor substrate. The first semiconductor layer includes a flat first face covering the dielectric layers and the surface of the compound semiconductor substrate, a layer constituting the first face containing a material capable of being lattice matched to a material constituting the compound semiconductor substrate.
    Type: Application
    Filed: December 27, 2017
    Publication date: June 27, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Rei HASHIMOTO, Shinji Saito, Tsutomu Kakuno, Kei Kaneko, Yasunobu Kai, Naotada Okada
  • Publication number: 20190199065
    Abstract: A quantum cascade laser has an active layer, a first and second cladding layer, and an optical guide layer. The active layer has a plurality of injection quantum well regions and a plurality of light-emitting quantum well regions. The each of the injection quantum well regions and the each of the light-emitting quantum well regions are alternatively stacked. The first and second cladding layers are provided to interpose the active layer from both sides, and have a refractive index lower than an effective refractive index of the each of the light-emitting quantum well regions. The optical guide layer is disposed to divide the active layer into two parts. The optical guide layer has a refractive index higher than the effective refractive index of the each of the light-emitting quantum well regions, and has a thickness greater than the thickness of all well layers of quantum well layers.
    Type: Application
    Filed: December 27, 2017
    Publication date: June 27, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinji SAITO, Tsutomu KAKUNO, Rei HASHIMOTO, Kei KANEKO
  • Publication number: 20190148915
    Abstract: A surface-emitting quantum cascade laser of an embodiment includes a semiconductor stacked body, an upper electrode, and a lower electrode. The semiconductor stacked body includes an active layer that includes a quantum well layer and emits infrared laser light, a first semiconductor layer that includes a photonic crystal layer in which pit parts constitute a rectangular grating, and a second semiconductor layer. The upper electrode is provided on the first semiconductor layer. The lower electrode is provided on a lower surface of a region of the second semiconductor layer overlapping at least the upper electrode. The photonic crystal layer is provided on the upper surface side of the first semiconductor layer. In plan view, the semiconductor stacked body includes a surface-emitting region including the photonic crystal layer and a current injection region. The upper electrode is provided on the current injection region.
    Type: Application
    Filed: November 13, 2018
    Publication date: May 16, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji SAITO, Tomohiro TAKASE, Rei HASHIMOTO, Tsutomu KAKUNO
  • Publication number: 20190148912
    Abstract: A surface-emitting quantum cascade laser of an embodiment comprises a substrate, an active layer, and a photonic crystal layer. The active layer has optical nonlinearity, and is capable of emitting a first and a second infrared laser light. The photonic crystal layer includes a first and a second region. The rectangular grating of the first region is orthogonal to the rectangular grating of the second region. The first infrared laser light has a wavelength corresponding to a maximum gain outside a first photonic bandgap in a direction parallel to a first side of two sides constituting the rectangular grating. The second infrared laser light has a wavelength corresponding to a maximum gain outside a second photonic bandgap in a direction parallel to a second side of the two sides of the rectangular grating.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 16, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rei HASHIMOTO, Shinji SAITO, Yuichiro YAMAMOTO, Tsutomu KAKUNO, Kei KANEKO, Tomohiro TAKASE
  • Publication number: 20190081456
    Abstract: A semiconductor laser device includes an active layer, a first layer, and a surface metal film. Multiple quantum well layers are stacked in the active layer; and the active layer is configured to emit laser light of a terahertz wave by an intersubband transition. The first layer is provided on the active layer and includes a first surface in which multiple pits are provided to form a two-dimensional lattice. The surface metal film is provided on the first layer and includes multiple openings. Each of the pits is asymmetric with respect to a line parallel to a side of the lattice. The laser light passes through the multiple openings and is emitted in a direction substantially perpendicular to the active layer.
    Type: Application
    Filed: September 2, 2016
    Publication date: March 14, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Osamu YAMANE, Shinji SAITO, Tsutomu KAKUNO, Kei KANEKO, Rei HASHIMOTO
  • Publication number: 20190074663
    Abstract: A surface emitting quantum cascade laser includes an active layer and a first semiconductor layer. The active layer includes a plurality of quantum well layers and is capable of emitting laser light by intersubband transition. The first surface includes an internal region and an outer peripheral region. Grating pitch of the first pits is m times grating pitch of the second pits. The outer peripheral region surrounds the internal region. A first planar shape of an opening end of the first pit is asymmetric with respect to a line passing through barycenter of the first planar shape and is parallel to at least one side of the first two-dimensional grating. A second planar shape of an opening end of the second pit is symmetric with respect to each of lines passing through barycenter of the second planar shape and is parallel to either side of the second two-dimensional grating.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 7, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji SAITO, Tsutomu KAKUNO, Rei HASHIMOTO, Kei KANEKO, Yasunobu KAI
  • Patent number: 9865770
    Abstract: According to one embodiment, a light emitting element includes n-type and p-type semiconductor layers and a light emitting unit. The light emitting unit is provided between the n-type semiconductor layer and the p-type semiconductor layer, the light emitting unit emits light with a peak wavelength of not less than 530 nm. The light emitting unit includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer provided between the n-side barrier layer and the p-type semiconductor layer, a first well layer contacting the n-side barrier layer between the n-side barrier layer and the first barrier layer, a first AlGaN layer provided between the first well layer and the first barrier layer and including Alx1Ga1-x1N (0.15?x1?1), and a first p-side InGaN layer provided between the first AlGaN layer and the first barrier layer and including Inya1Ga1-ya1N (0<ya1?0.1).
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: January 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Rei Hashimoto, Jongil Hwang, Shinya Nunoue
  • Patent number: 9337400
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: May 10, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Shigeya Kimura, Jongil Hwang, Hiroshi Katsuno, Shinji Saito, Shinya Nunoue
  • Publication number: 20160126411
    Abstract: According to one embodiment, a light emitting element includes n-type and p-type semiconductor layers and a light emitting unit. The light emitting unit is provided between the n-type semiconductor layer and the p-type semiconductor layer, the light emitting unit emits light with a peak wavelength of not less than 530 nm. The light emitting unit includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer provided between the n-side barrier layer and the p-type semiconductor layer, a first well layer contacting the n-side barrier layer between the n-side barrier layer and the first barrier layer, a first AlGaN layer provided between the first well layer and the first barrier layer and including Alx1Ga1-x1N (0.15?x1?1), and a first p-side InGaN layer provided between the first AlGaN layer and the first barrier layer and including Inya1Ga1-ya1N (0<ya1?0.1).
    Type: Application
    Filed: January 13, 2016
    Publication date: May 5, 2016
    Inventors: Shinji SAITO, Rei HASHIMOTO, Jongil HWANG, Shinya NUNOUE
  • Patent number: 9312429
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer and a first semiconductor layer. The first semiconductor layer is arranged with the light emitting layer in a first direction. The first semiconductor layer includes a first portion and a second portion. The first portion and a second portion include a nitride semiconductor. The first portion has a first lattice polarity. The second portion has a second lattice polarity different from the first lattice polarity.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: April 12, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Rei Hashimoto, Shinji Saito, Shinya Nunoue
  • Publication number: 20160079480
    Abstract: A semiconductor light-emitting device includes a first layer having a first surface and an opposing second surface. The first surface has a roughness including a bottom portion and a top portion. A light emitting layer is provided between the second surface and a second layer. An insulating layer is provided on the first surface. The insulating layer includes a first portion adjacent to the bottom portion and a second portion adjacent to the top portion along the first direction. The first portion has a thickness that is greater than a thickness of the second portion.
    Type: Application
    Filed: March 1, 2015
    Publication date: March 17, 2016
    Inventors: Kei KANEKO, Rei HASHIMOTO, Satoshi MITSUGI, Chie HONGO
  • Publication number: 20160079473
    Abstract: A semiconductor light emitting element includes a first layer, a second layer, an intermediate layer, and a third layer. The first layer has a first surface having roughness including concave portions of which side surfaces are inclined and a second surface on an opposite side to the first surface. The first layer includes a first conductive-type first semiconductor layer. The second layer includes a second conductive-type second semiconductor layer. The intermediate layer is provided between the second surface and the second layer. The third layer is provided in the concave portions.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 17, 2016
    Inventors: Rei HASHIMOTO, Kei KANEKO, Satoshi MITSUGI, Chie HONGO
  • Patent number: 9287441
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can prepare a substrate unit including a base substrate, an intermediate crystal layer, and a first mask layer. The intermediate crystal layer has a major surface having a first region, a second region, and a first intermediate region. The first mask layer is provided on the first intermediate region. The method can implement a first growth to grow a first lower layer on the first region and grow a second lower layer on the second region. The first and second lower layers include a semiconductor crystal. The method can implement a second growth to grow a second upper layer while growing a first upper layer to cover the first mask layer with the first and second upper layers. The method can implement cooling to separate the first and second upper layers.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: March 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Rei Hashimoto, Shinji Saito, Hung Hung, Shinya Nunoue