Patents by Inventor Rei Hashimoto

Rei Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150340348
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.
    Type: Application
    Filed: July 31, 2015
    Publication date: November 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KATSUNO, Shinji SAITO, Rei HASHIMOTO, Jongil HWANG, Shinya NUNOUE
  • Publication number: 20150325555
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Application
    Filed: June 9, 2015
    Publication date: November 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rei Hashimoto, Shigeya Kimura, Jongil Hwang, Hiroshi Katsuno, Shinji Saito, Shinya Nunoue
  • Patent number: 9136253
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: September 15, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Shinji Saito, Rei Hashimoto, Jongil Hwang, Shinya Nunoue
  • Patent number: 9093588
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a well layer, a barrier layer, an Al-containing layer, and an intermediate layer. The p-type semiconductor layer is provided on a side of [0001] direction of the n-type semiconductor layer. The well layer, the barrier layer, the Al-containing layer and the intermediate layer are disposed between the n-type semiconductor layer and the p-type semiconductor layer subsequently. The Al-containing layer has a larger band gap energy than the barrier layer, a smaller lattice constant than the n-type semiconductor layer, and a composition of Alx1Ga1-x1-y1Iny1N. The intermediate layer has a larger band gap energy than the well layer, and has a first portion and a second portion provided between the first portion and the p-type semiconductor layer. A band gap energy of the first portion is smaller than that of the second portion.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Maki Sugai, Rei Hashimoto, Yasushi Hattori, Masaki Tohyama, Shinya Nunoue
  • Patent number: 9076929
    Abstract: According to one embodiment, a semiconductor light emitting element includes a first electrode, first and second light emitting units, first and second conductive layers, a first connection electrode, a first dielectric layer, first and second pads, and a first inter-light emitting unit dielectric layer. The first light emitting unit includes first and second semiconductor layers, and a first light emitting layer. The first semiconductor layer includes a first semiconductor portion and a second semiconductor portion. The second light emitting unit includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is electrically connected with the first electrode. The first conductive layer is electrically connected with the third semiconductor layer. The second conductive layer is electrically connected with the second semiconductor layer.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: July 7, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Shinji Saito, Rei Hashimoto, Jongil Hwang, Shinya Nunoue
  • Patent number: 9072146
    Abstract: A light-emitting electric-power generation module according to an embodiment includes a photoelectric conversion element for emitting light and generating electric power, a light-emission controller configured to control light emission of the photoelectric conversion element, an electric-power generation controller configured to control electric-power generation of the photoelectric conversion element, and a switching unit configured to switch light-emission state and electric-power generation state of the photoelectric conversion element.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: June 30, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Jongil Hwang, Shinji Saito, Shinya Nunoue
  • Patent number: 9012886
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer; a second semiconductor layer; and a light emitting layer provided between the first and the second semiconductor layers. The first semiconductor layer includes a nitride semiconductor, and is of an n-type. The second semiconductor layer includes a nitride semiconductor, and is of a p-type. The light emitting layer includes: a first well layer; a second well layer provided between the first well layer and the second semiconductor layer; a first barrier layer provided between the first and the second well layers; and a first Al containing layer contacting the second well layer between the first barrier layer and the second well layer and containing layer containing Alx1Ga1-x1N (0.1?x1?0.35).
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Rei Hashimoto, Shinya Nunoue
  • Publication number: 20150034968
    Abstract: A photoelectric conversion element of an embodiment is a photoelectric conversion element which performs photoelectric conversion by receiving illumination light having n light emission peaks having a peak energy Ap (eV) (where 1?p?n and 2?n) of 1.59?Ap?3.26 and a full width at half maximum Fp (eV) (where 1?p?n and 2?n), wherein the photoelectric conversion element includes m photoelectric conversion layers having a band gap energy Bq (eV) (where 1?q?m and 2?m?n), and the m photoelectric conversion layers each satisfy the relationship of Ap?Fp<Bq?Ap with respect to any one of the n light emission peaks.
    Type: Application
    Filed: October 17, 2014
    Publication date: February 5, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinji SAITO, Rei HASHIMOTO, Mizunori EZAKI, Shinya NUNOUE, Hironori ASAI
  • Publication number: 20150021546
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer and a first semiconductor layer. The first semiconductor layer is arranged with the light emitting layer in a first direction. The first semiconductor layer includes a first portion and a second portion. The first portion and a second portion include a nitride semiconductor. The first portion has a first lattice polarity. The second portion has a second lattice polarity different from the first lattice polarity.
    Type: Application
    Filed: July 18, 2014
    Publication date: January 22, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jongil HWANG, Rei HASHIMOTO, Shinji SAITO, Shinya NUNOUE
  • Publication number: 20150001561
    Abstract: According to one embodiment, a semiconductor light emitting element includes a first electrode, first and second light emitting units, first and second conductive layers, a first connection electrode, a first dielectric layer, first and second pads, and a first inter-light emitting unit dielectric layer. The first light emitting unit includes first and second semiconductor layers, and a first light emitting layer. The first semiconductor layer includes a first semiconductor portion and a second semiconductor portion. The second light emitting unit includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is electrically connected with the first electrode. The first conductive layer is electrically connected with the third semiconductor layer. The second conductive layer is electrically connected with the second semiconductor layer.
    Type: Application
    Filed: June 26, 2014
    Publication date: January 1, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: HIROSHI KATSUNO, SHINJI SAITO, REI HASHIMOTO, JONGIL HWANG, SHINYA NUNOUE
  • Publication number: 20150001572
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.
    Type: Application
    Filed: February 10, 2014
    Publication date: January 1, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KATSUNO, Shinji SAITO, Rei HASHIMOTO, Jongil HWANG, Shinya NUNOUE
  • Patent number: 8896076
    Abstract: A photoelectric conversion element of an embodiment is a photoelectric conversion element which performs photoelectric conversion by receiving illumination light having n light emission peaks having a peak energy Ap (eV) (where 1?p?n and 2?n) of 1.59?Ap?3.26 and a full width at half maximum Fp (eV) (where 1?p?n and 2?n), wherein the photoelectric conversion element includes m photoelectric conversion layers having a band gap energy Bq (eV) (where 1?q?m and 2?m?n), and the m photoelectric conversion layers each satisfy the relationship of Ap?Fp<Bq?Ap with respect to any one of the n light emission peaks.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Rei Hashimoto, Mizunori Ezaki, Shinya Nunoue, Hironori Asai
  • Publication number: 20140252382
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Application
    Filed: February 10, 2014
    Publication date: September 11, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Rei HASHIMOTO, Shigeya KIMURA, Jongil HWANG, Hiroshi KATSUNO, Shinji SAITO, Shinya NUNOUE
  • Patent number: 8729575
    Abstract: The semiconductor light emitting device according to an embodiment includes an N-type nitride semiconductor layer, a nitride semiconductor active layer disposed on the N-type nitride semiconductor layer, and a P-type nitride semiconductor layer disposed on the active layer. The P-type nitride semiconductor layer includes an aluminum gallium nitride layer. The indium concentration in the aluminum gallium nitride layer is between 1E18 atoms/cm3 and 1E20 atoms/cm3 inclusive. The carbon concentration is equal to or less than 6E17 atoms/cm3. Where the magnesium concentration is denoted by X and the acceptor concentration is denoted by Y, Y>{(?5.35e19)2?(X?2.70e19)2}1/2?4.63e19 holds.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Hung Hung, Yasushi Hattori, Rei Hashimoto, Shinji Saito, Masaki Tohyama, Shinya Nunoue
  • Publication number: 20140111095
    Abstract: A light-emitting electric-power generation module according to an embodiment includes a photoelectric conversion element for emitting light and generating electric power, a light-emission controller configured to control light emission of the photoelectric conversion element, an electric-power generation controller configured to control electric-power generation of the photoelectric conversion element, and a switching unit configured to switch light-emission state and electric-power generation state of the photoelectric conversion element.
    Type: Application
    Filed: April 1, 2013
    Publication date: April 24, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Rei HASHIMOTO, Jongil Hwang, Shinji Saito, Shinya Nunoue
  • Publication number: 20140080240
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can prepare a substrate unit including a base substrate, an intermediate crystal layer, and a first mask layer. The intermediate crystal layer has a major surface having a first region, a second region, and a first intermediate region. The first mask layer is provided on the first intermediate region. The method can implement a first growth to grow a first lower layer on the first region and grow a second lower layer on the second region. The first and second lower layers include a semiconductor crystal. The method can implement a second growth to grow a second upper layer while growing a first upper layer to cover the first mask layer with the first and second upper layers. The method can implement cooling to separate the first and second upper layers.
    Type: Application
    Filed: February 28, 2013
    Publication date: March 20, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Rei Hashimoto, Shinji Saito, Hung Hung, Shinya Nunoue
  • Publication number: 20140048818
    Abstract: A photoelectric conversion element of an embodiment is a photoelectric conversion element which performs photoelectric conversion by receiving illumination light having n light emission peaks having a peak energy Ap (eV) (where 1?p?n and 2?n) of 1.59?Ap?3.26 and a full width at half maximum Fp (eV) (where 1?p?n and 2?n), wherein the photoelectric conversion element includes m photoelectric conversion layers having a band gap energy Bq (eV) (where 1?q?m and 2?m?n), and the m photoelectric conversion layers each satisfy the relationship of Ap?Fp<Bq?Ap with respect to any one of the n light emission peaks.
    Type: Application
    Filed: July 29, 2013
    Publication date: February 20, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinji SAITO, Rei HASHIMOTO, Mizunori EZAKI, Shinya NUNOUE, Hironori ASAI
  • Publication number: 20140042388
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer; a second semiconductor layer; and a light emitting layer provided between the first and the second semiconductor layers. The first semiconductor layer includes a nitride semiconductor, and is of an n-type. The second semiconductor layer includes a nitride semiconductor, and is of a p-type. The light emitting layer includes: a first well layer; a second well layer provided between the first well layer and the second semiconductor layer; a first barrier layer provided between the first and the second well layers; and a first Al containing layer contacting the second well layer between the first barrier layer and the second well layer and containing layer containing Alx1Ga1-x1N (0.1?x1?0.35).
    Type: Application
    Filed: March 14, 2013
    Publication date: February 13, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Rei Hashimoto, Shinya Nunoue
  • Patent number: 8649408
    Abstract: According to one embodiment, a semiconductor laser device with high reliability and excellent heat dissipation is provided. The semiconductor laser device includes an active layer, a p-type semiconductor layer on the active layer, a pair of grooves formed by etching into the p-type semiconductor layer, a stripe sandwiched by the pair of grooves and having shape of ridge, and a pair of buried layers made of insulator to bury the grooves. The bottom surfaces of the grooves are shallower with an increase in distance from the stripe.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: February 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Maki Sugai, Jongil Hwang, Yasushi Hattori, Shinji Saito, Masaki Tohyama, Shinya Nunoue
  • Patent number: 8457167
    Abstract: Embodiments describe a semiconductor laser device driven at low voltage and which is excellent for cleavage and a method of manufacturing the device. In one embodiment, the semiconductor laser device includes a GaN substrate; a semiconductor layer formed on the GaN substrate; a ridge formed in the semiconductor layer; a recess formed in the bottom surface of the GaN substrate. The recess has a depth less than the thickness of the GaN substrate. The device also has a notch deeper than the recess formed on a side surface of the GaN substrate and separated from the recess. In the semiconductor laser device, the total thickness of the GaN substrate and the semiconductor layer is 100 ?m or more, and the distance between the top surface of the ridge and the bottom surface of the recess is 5 ?m or more and 50 ?m or less.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Maki Sugai, Shinji Saito, Rei Hashimoto, Yasushi Hattori, Jongil Hwang, Masaki Tohyama, Shinya Nunoue