Patents by Inventor Reijiroh Shohji

Reijiroh Shohji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11201185
    Abstract: Provided is a solid-state imaging device including a first substrate that includes a pixel unit, a first semiconductor substrate, and a first multi-layered wiring layer stacked, a second substrate that includes circuit, a second semiconductor substrate, and a second multi-layered wiring layer stacked, the circuit having a predetermined function, a third substrate that includes a circuit, a third semiconductor substrate, and a third multi-layered wiring layer. The first substrate and the second substrate being bonded together such that the first multi-layered wiring layer is opposite to the second semiconductor substrate, and a first coupling structure for electrically coupling the circuit of the first substrate with the circuit of the second substrate, the first coupling structure is on bonding surfaces of the first substrate and the second substrate, and includes an electrode junction structure in which electrodes on the respective bonding surfaces are joined to each other in direct contact.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: December 14, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ikue Mitsuhashi, Reijiroh Shohji, Minoru Ishida, Tadashi Iijima, Takatoshi Kameshima, Hideto Hashiguchi, Hiroshi Horikoshi, Masaki Haneda
  • Publication number: 20210366973
    Abstract: Provided are a solid-state imaging device and an electronic apparatus with further improved performance. The solid-state imaging device including a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked, a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked, and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together with the first multi-layered wiring layer and the second semiconductor substrate opposed to each other.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Inventors: HIROSHI HORIKOSHI, MINORU ISHIDA, REIJIROH SHOHJI, TADASHI IIJIMA, TAKATOSHI KAMESHIMA, HIDETO HASHIGUCHI, IKUE MITSUHASHI, MASAKI HANEDA
  • Patent number: 11152418
    Abstract: There is provided a solid-state imaging device including first, second, and third substrates stacked in this order. The first substrate includes a first semiconductor substrate and a first wiring layer. A pixel unit is formed on the first semiconductor substrate. The second substrate includes a second semiconductor substrate and a second wiring layer. The third substrate includes a third semiconductor substrate and a third wiring layer. A first coupling structure couples two of the first, second, and third substrates to each other includes a via. The via has a structure in which electrically-conductive materials are embedded in one through hole and another through hole, or a structure in which films including electrically-conductive materials are formed on inner walls of the through holes. The one through hole exposes a first wiring line in one of the wiring layers. The other through hole exposes a second wiring line in another wiring layer.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: October 19, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Takatoshi Kameshima, Hideto Hashiguchi, Ikue Mitsuhashi, Hiroshi Horikoshi, Reijiroh Shohji, Minoru Ishida, Tadashi Iijima, Masaki Haneda
  • Publication number: 20210272933
    Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Applicant: Sony Group Corporation
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Patent number: 11101313
    Abstract: [Object] To provide a solid-state imaging device and an electronic apparatus with further improved performance. [Solution] A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together with the first multi-layered wiring layer and the second semiconductor substrate opposed to each other.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: August 24, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hiroshi Horikoshi, Minoru Ishida, Reijiroh Shohji, Tadashi Iijima, Takatoshi Kameshima, Hideto Hashiguchi, Ikue Mitsuhashi, Masaki Haneda
  • Patent number: 11094729
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: August 17, 2021
    Inventors: Taku Umebayashi, Hiroshi Takahashi, Reijiroh Shohji
  • Publication number: 20210217797
    Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto HASHIGUCHI, Reijiroh SHOHJI, Hiroshi HORIKOSHI, Ikue MITSUHASHI, Tadashi IIJIMA, Takatoshi KAMESHIMA, Minoru ISHIDA, Masaki HANEDA
  • Patent number: 11063020
    Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: July 13, 2021
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Patent number: 10998369
    Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: May 4, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Publication number: 20210104572
    Abstract: There is provided a solid-state imaging device including first, second, and third substrates stacked in this order. The first substrate includes a first semiconductor substrate and a first wiring layer. A pixel unit is formed on the first semiconductor substrate. The second substrate includes a second semiconductor substrate and a second wiring layer. The third substrate includes a third semiconductor substrate and a third wiring layer. A first coupling structure couples two of the first, second, and third substrates to each other includes a via. The via has a structure in which electrically-conductive materials are embedded in one through hole and another through hole, or a structure in which films including electrically-conductive materials are formed on inner walls of the through holes. The one through hole exposes a first wiring line in one of the wiring layers. The other through hole exposes a second wiring line in another wiring layer.
    Type: Application
    Filed: March 23, 2018
    Publication date: April 8, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takatoshi KAMESHIMA, Hideto HASHIGUCHI, Ikue MITSUHASHI, Hiroshi HORIKOSHI, Reijiroh SHOHJI, Minoru ISHIDA, Tadashi IIJIMA, Masaki HANEDA
  • Publication number: 20210104571
    Abstract: There is provided a solid-state imaging device including: a first substrate including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate having a pixel unit with pixels; a second substrate including a second semiconductor substrate and a second wiring layer, the second semiconductor substrate having a circuit with a predetermined function; and a third substrate including a third semiconductor substrate and a third wiring layer, the third semiconductor substrate having a circuit with a predetermined function, the first, second, and third substrates being stacked in this order, the first substrate and the second substrate being bonded together with the first wiring layer and the second wiring layer opposed to each other, a first coupling structure on bonding surfaces of the first substrate and the second substrate, and including an electrode junction structure with electrodes formed on the respective bonding surfaces in direct contact with each other.
    Type: Application
    Filed: March 23, 2018
    Publication date: April 8, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Reijiroh SHOHJI, Masaki HANEDA, Hiroshi HORIKOSHI, Minoru ISHIDA, Takatoshi KAMESHIMA, Ikue MITSUHASHI, Hideto HASHIGUCHI, Tadashi IIJIMA
  • Publication number: 20210104570
    Abstract: [Object] To provide a solid-state imaging device and an electronic apparatus with further improved performance.
    Type: Application
    Filed: March 23, 2018
    Publication date: April 8, 2021
    Inventors: IKUE MITSUHASHI, REIJIROH SHOHJI, MINORU ISHIDA, TADASHI IIJIMA, TAKATOSHI KAMESHIMA, HIDETO HASHIGUCHI, HIROSHI HORIKOSHI, MASAKI HANEDA
  • Publication number: 20210091133
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Application
    Filed: December 2, 2020
    Publication date: March 25, 2021
    Applicant: Sony Corporation
    Inventors: Taku Umebayashi, Hiroshi Takahashi, Reijiroh Shohji
  • Patent number: 10950647
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: March 16, 2021
    Assignee: SONY CORPORATION
    Inventors: Taku Umebayashi, Hiroshi Takahashi, Reijiroh Shohji
  • Patent number: 10916577
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: February 9, 2021
    Assignee: Sony Corporation
    Inventors: Taku Umebayashi, Hiroshi Takahashi, Reijiroh Shohji
  • Patent number: 10847744
    Abstract: To provide a light emitting element, a display device, and an electronic apparatus, less influenced by light emitted outside a light emitting region. A light emitting element includes: a light emitting region formed on a plane; a transparent electrode formed in a planar region that is larger than the light emitting region and internally includes the light emitting region; a reflector disposed under the transparent electrode and formed in the planar region inside the light emitting region; an organic light emitting layer disposed on the transparent electrode and formed so as to extend to the outside of the light emitting region; and a counter electrode disposed on the organic light emitting layer and formed so as to extend to the outside of the light emitting region.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: November 24, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Reijiroh Shohji
  • Publication number: 20200357723
    Abstract: The present technology relates to a semiconductor device, an imaging device, and a manufacturing apparatus, capable of providing a semiconductor substrate maintaining and improving insulating performance. A through hole that penetrates the semiconductor substrate, an electrode at the center of the through hole, and a space around the electrode are included. The through hole also penetrates an insulating film formed on the semiconductor substrate. A barrier metal is further included around the electrode. An insulating film is further included in the semiconductor substrate and the space. The semiconductor device has a multilayer structure, and the electrode connects wirings formed in different layers to each other. The present technology can be applied to, for example, an image sensor in which a logic circuit and a sensor circuit are laminated.
    Type: Application
    Filed: October 5, 2018
    Publication date: November 12, 2020
    Inventor: REIJIROH SHOHJI
  • Publication number: 20200328244
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Applicant: Sony Corporation
    Inventors: Taku Umebayashi, Hiroshi Takahashi, Reijiroh Shohji
  • Publication number: 20200243591
    Abstract: [Object] To further improve performance of a solid-state imaging device. [Solution] There is provided a solid-state imaging device including: a first substrate; a second substrate; and a third substrate that are stacked in this order. The first substrate includes a first semiconductor substrate and a first multi-layered wiring layer stacked on the first semiconductor substrate. The first semiconductor substrate has a pixel unit formed thereon. The pixel unit has pixels arranged thereon. The second substrate includes a second semiconductor substrate and a second multi-layered wiring layer stacked on the second semiconductor substrate. The second semiconductor substrate has a circuit formed thereon. The circuit has a predetermined function. The third substrate includes a third semiconductor substrate and a third multi-layered wiring layer stacked on the third semiconductor substrate. The third semiconductor substrate has a circuit formed thereon. The circuit has a predetermined function.
    Type: Application
    Filed: March 23, 2018
    Publication date: July 30, 2020
    Inventors: TADASHI IIJIMA, TAKATOSHI KAMESHIMA, IKUE MITSUHASHI, HIROSHI HORIKOSHI, HIDETO HASHIGUCHI, REIJIROH SHOHJI, MINORU ISHIDA, MASAKI HANEDA
  • Publication number: 20200152685
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Application
    Filed: January 17, 2020
    Publication date: May 14, 2020
    Inventors: Taku Umebayashi, Hitoshi Takahashi, Reijiroh Shohji