Abstract: A method and device for frequency conversion is disclosed in which a first signal with a first frequency is converted into a second frequency through mixing with a divided oscillator signal and wherein the frequency of the divided oscillator signal stands in a fractional rational ratio to the frequency of the undivided oscillator signal. The method is characterized in that the oscillator signal is divided such that an average value of the divided oscillator signal over time corresponds to half the separation between the extreme values of the divided oscillator signal.

Abstract: In one aspect, a voltage controlled oscillator is provided that includes circuitry comprising tunable coupled resonator networks, which are coupled to a terminal of a pair of three-terminal devices through a tuning voltage network which supports wide-band tunability. In another aspect, a wide-band tunable resonator is provided that is amenable to integration in the integrated circuit form.

Abstract: A circuit arrangement includes a first phase locked loop to generate a first oscillator frequency, a second phase locked loop to generate a second oscillator frequency, a reference frequency emitter connected to a reference frequency input of both phase locked loops, and a signal attenuator and optionally a switch connected between a master signal output of the first (master) loop and an input of the second (slave) loop. In a method, a common reference frequency is provided to both loops, the first loop generates a first oscillator frequency, and the second loop generates a second oscillator frequency that matches the first oscillator frequency in at least one operating mode and optionally differs from the first oscillator frequency in another operating mode. The frequency matching in one of the modes involves feeding an attenuated signal from the first loop operating as a master into the second loop operating as a slave.

Abstract: Noise impulses are suppressed in a signal processing circuit by gating an input signal. The gated signal is then smoothed upstream of demodulating the smoothed signal as viewed in a signal flow direction from a signal input to a processed signal output. The signal processing circuit system includes at least a signal gating section followed by a signal smoothing section followed by a demodulating section in that order and as viewed in the signal flow direction. Thus, smoothing takes place prior to demodulation.

Abstract: 1.

Abstract: In stereo receivers with digital decoding pulse generation, interference by the harmonics of the digital switching signal with signals in adjacent channels or with carrier signals in the sideband lead to faults that can be perceived in the audible range as chirping. An integrated stereo decoder with digital decoding pulse generation is described in which the low-harmonic, step-like switching signal consecutively assumes within a period and relative to the amplitude the values (1+.sqroot.2).sup.-1, 1, (1+.sqroot.2).sup.-1, -(1+.sqroot.2).sup.-1, -1, -(1+.sqroot.2).sup.-1, with the .+-.(1+.sqroot.2).sup.-1 values each persisting for an eighth of the period and the .+-.1 values a quarter of the period. Furthermore, an integrated circuit array for generation of this low-harmonic oscillation is described.