Abstract: Epitaxially coated semiconductor wafers are prepared by a process in which a semiconductor wafer polished at least on its front side is placed on a susceptor in a single-wafer epitaxy reactor and epitaxially coated on its polished front side at temperatures of 1000-1200° C., wherein, after coating, the semiconductor wafer is cooled in the temperature range from 1200° C. to 900° C. at a rate of less than 5° C. per second. In a second method for producing an epitaxially coated wafer, the wafer is placed on a susceptor in the epitaxy reactor and epitaxially coated on its polished front side at a deposition temperature of 1000-1200° C., and after coating, and while still at the deposition temperature, the wafer is raised for 1-60 seconds to break connections between susceptor and wafer produced by deposited semiconductor material before the wafer is cooled.

Abstract: A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 ?m relative to an edge exclusion of 2 mm.

Abstract: A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 ?m relative to an edge exclusion of 2 mm.

Abstract: In a method for producing epitaxially coated semiconductor wafers, a multiplicity of prepared, front side-polished semiconductor wafers are successively coated individually with an epitaxial layer on their polished front sides at temperatures of 800-1200° C. in a reactor, while supporting the prepared semiconductor wafer over a susceptor having a gas-permeable structure, on a ring placed on the susceptor which acts as a thermal buffer between the susceptor and the supported semiconductor wafer, the semiconductor wafer resting on the ring, and its backside facing but not contacting the susceptor, so that gaseous substances are delivered from a region over the backside of the semiconductor wafer by gas diffusion through the susceptor into a region over the backside of the susceptor, the semiconductor wafer contacting the ring only in an edge region of its backside, wherein no stresses measurable by means of photoelastic stress measurement (“SIRD”) occur in the semiconductor wafer.

Abstract: A susceptor configured to receive a semiconductor wafer for deposition of a layer on a front surface of the semiconductor wafer by chemical vapor deposition (CVD) has a gas-permeable structure with a porosity of at least 15%, a density of from 0.5 to 1.5 g/cm3, a pore diameter of less than 0.1 mm and an internal surface area of the pores which is greater than 10,000 cm2/cm3. Semiconductor wafers having front surface coated by chemical vapor deposition (CVD) and a polished or etched back surface, prepared using the gas-permeable susceptor, have a nanotopography of the back surface, expressed as the PV (=peak to valley) height fluctuation, of less than 5 nm, and at the same time the halo of the back surface, expressed as haze, is less than 5 ppm.

Abstract: Epitaxially coated silicon wafers, are produced by epitaxially coating a multiplicity of wafers polished at least on their front sides, successively and individually in an epitaxy reactor, by placing a silicon wafer on a susceptor, pretreating under a hydrogen atmosphere followed by addition of an etching medium to the hydrogen atmosphere, coating epitaxially on the polished front side and removing the water from the epitaxy reactor. The susceptor is then heated, in each case, to a temperature of at least 1000° C. under a hydrogen atmosphere, and furthermore an etching treatment of the susceptor and a momentary coating of the susceptor with silicon are effected after a specific number of epitaxial coatings. Silicon wafers characterized by a parameter R30-1 mm of ?10 nm to +10 nm, determined at a distance of 1 mm from the edge of the silicon wafer are produced.

Abstract: A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 ?m relative to an edge exclusion of 2 mm.

Abstract: Epitaxially coated silicon wafers, are coated individually in an epitaxy reactor by placing a wafer on a susceptor, pretreating under a hydrogen atmosphere, in and then with addition of an etching medium, and coating epitaxially on a polished front side, wherein an etching treatment of the susceptor is effected after a specific number of epitaxial coatings, and the susceptor is then hydrophilized. Silicon wafer produced thereby have a maximum local flatness value SFQRmax of 0.01 ?m to 0.035 ?m relative to at least 99% of the partial regions of an area grid of measurement windows having a size of 26×8 mm2 on the front side of the silicon wafer with an edge exclusion of 2 mm.

Abstract: A susceptor for a semiconductor wafer to be placed on during deposition of a layer on a front surface of the semiconductor wafer by chemical vapor deposition (CVD), has a gas-permeable structure with a porosity of at least 15% and a density of from 0.5 to 1.5 g/cm3. There is also a semiconductor wafer having a back surface and a front surface which has been coated by chemical vapor deposition (CVD) and a polished or etched back surface. The nanotopography of the back surface, expressed as the height fluctuation PV (=peak to valley), is less than 5 nm. There is a process for producing the semiconductor wafer.

Abstract: A susceptor configured to receive a semiconductor wafer for deposition of a layer on a front surface of the semiconductor wafer by chemical vapor deposition (CVD) has a gas-permeable structure with a porosity of at least 15%, a density of from 0.5 to 1.5 g/cm3, a pore diameter of less than 0.1 mm and an internal surface area of the pores which is greater than 10,000 cm2/cm3. Semiconductor wafers having front surface coated by chemical vapor deposition (CVD) and a polished or etched back surface, prepared using the gas-permeable susceptor, have a nanotopography of the back surface, expressed as the PV (=peak to valley) height fluctuation, of less than 5 nm, and at the same time the halo of the back surface, expressed as haze, is less than 5 ppm.

Abstract: A susceptor for a semiconductor wafer to be placed on during deposition of a layer on a front surface of the semiconductor wafer by chemical vapor deposition (CVD), has a gas-permeable structure with a porosity of at least 15% and a density of from 0.5 to 1.5 g/cm3. There is also a semiconductor wafer having a back surface and a front surface which has been coated by chemical vapor deposition (CVD) and a polished or etched back surface. The nanotopography of the back surface, expressed as the height fluctuation PV (=peak to valley), is less than 5 nm. There is a process for producing the semiconductor wafer.

Abstract: A semiconductor wafer is made of a silicon substrate wafer and an epitaxial silicon layer deposited thereon. The substrate wafer has a specific resistance of 0.1 to 50 &OHgr;cm, an oxygen concentration of less than 7.5*1017 atcm−3 and a nitrogen concentration of 1*1013 to 5*1015 atcm−3. The epitaxial layer is 0.2 to 1.0 &mgr;m thick and has a surface on which fewer than 30 LLS (localized light scattering) defects which are greater in size than 0.085 &mgr;m can be detected. A method for producing the semiconductor wafer has a sequence of steps for providing the substrate wafer with the aforementioned features; heating the substrate wafer in a deposition reactor to a deposition temperature of at least 1120° C.; and depositing the epitaxial layer thereon with a thickness of 0.2 to 1.0 &mgr;m, immediately after the deposition temperature has been reached.

Abstract: A method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front, includes the following process steps: (a) preparing a substrate wafer having a polished front and a specific thickness; (b) pretreating the front of the substrate wafer in the presence of HCl gas and a silane source at a temperature of from 950 to 1250 degrees Celsius in an epitaxy reactor, the thickness of the substrate wafer remaining substantially unchanged; and (c) depositing the epitaxial layer on the front of the pretreated substrate wafer.

Abstract: A method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front, includes the following process steps:

Abstract: A standard for calibrating and checking a nanotopography unit, includes a substrate and at least one structure which is deposited on the substrate. It has a lateral extent of 0.5 to 20 mm and a vertical extent of 5 to 500 nm and is bounded by edges which have a gradient of at most 1*10−3. There is also a method for producing the standard, with material being deposited on the substrate at an inhomogeneous deposition rate.

Abstract: A method for producing a semiconductor wafer includes the deposition of an epitaxial layer onto a substrate wafer in a deposition reactor. The semiconductor wafer, following the deposition of the epitaxial layer, undergoes treatment in an ozone-containing atmosphere.

Abstract: For the production of high-quality electronic components based on semiconductors, semiconductor wafers are needed which have a substantially lower oxygen concentration in the wafer region near the surface in which the components are integrated than in the other wafer region. This region, known as "denuded zone," was hitherto obtained by prolonged heat treatment of the wafers in a batch reactor as a consequence of partial diffusion of the oxygen out from the substrate. In the process according to the invention, the low-oxygen region is produced by the epitaxial deposition of two differently doped semiconductor layers on the wafer surface in a single-wafer reactor.