Patents by Inventor Ren Cheng

Ren Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162288
    Abstract: A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 16, 2024
    Applicant: Silanna Asia Pte Ltd
    Inventors: Wen Cheng Lin, Ren Huei Tzeng, Shanghui Larry Tu
  • Patent number: 11985610
    Abstract: An information indicating method, an information determining method, a terminal and a base station are provided. The information indicating method includes: indicating, by using a predetermined parameter of a physical broadcast channel (PBCH) in a first system synchronization block (SSB), whether the first SSB includes associated remaining minimum system information (RMSI); or indicating, by using a predetermined parameter of a PBCH in a first SSB, that the first SSB does not include associated RMSI, and indicating frequency offset information of a synchronization raster where a second SSB is located, where the second SSB is an SSB with the associated RMSI.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 14, 2024
    Assignee: DATANG MOBILE COMMUNICATIONS EQUIPMENT CO., LTD.
    Inventors: Ren Da, Zheng Zhao, Bin Ren, FangChen Cheng
  • Patent number: 11984261
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a dielectric structure sandwiched between a first electrode and a bottom electrode. A passivation layer overlies the second electrode and the dielectric structure. The passivation layer comprises a horizontal surface vertically below a top surface of the passivation layer. The horizontal surface is disposed above a top surface of the dielectric structure.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
  • Patent number: 11979916
    Abstract: Disclosed are a method and apparatus for determining an RA-RNTI. In the present application, a base station receives a random access preamble sent by a terminal; the base station determines an RA-RNTI according to a time-frequency resource occupied by the random access preamble, and the time-frequency resource is a time-frequency resource of an orthogonal frequency division multiplexing (OFDM) symbol level; and the base station sends a random access response message, and the random access response message includes downlink control information allocated, by the base station, for the terminal, and the downlink control information is scrambled using the RA-RNTI. By means of the present application, an RA-RNTI can be determined during a random access process of an NR system.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: May 7, 2024
    Assignee: DATANG MOBILE COMMUNICATIONS EQUIPMENT CO., LTD.
    Inventors: Bin Ren, Zheng Zhao, Ren Da, Tie Li, Fang-Chen Cheng
  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11971657
    Abstract: A photoresist developer includes a solvent having Hansen solubility parameters of 15<?d<25, 10<?p<25, and 6<?p<30; an acid having an acid dissociation constant, pKa, of ?15<pKa<4, or a base having a pKa of 40>pKa>9.5; and a chelate.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Ren Zi, Chin-Hsiang Lin, Ching-Yu Chang, Yahru Cheng
  • Publication number: 20240126821
    Abstract: Techniques for providing suggested content is described. For example, a social networking system may receive, from an account of a social networking system, an indication of a selection of a first content item. The social networking system may determine that the first content item is associated with a first topic and may receive a request from the account to access a second content item associated with the first topic. The social networking system may then cause presentation of the second content item and may determine that the request meets or exceeds a threshold number of requests for content items associated with the first topic. Based on determining that the request meets or exceeds the threshold, the social networking system may cause presentation of a suggested content item associated with a second topic.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: Han Ren, Shruti Bhutada, Jus-Tin Cheng, Ellen Yutong Lu, Rehman Khan, Jonathan Eusung Kim, Shilpa Mody, Woo Jung Oh, Kyle Yank Zhu, Gargi Apte, Moira Kathleen Ballantyne Burke
  • Patent number: 11942322
    Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Ren Zi, Chun-Chih Ho, Yahru Cheng, Ching-Yu Chang
  • Publication number: 20240096834
    Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Shih Hsuan HSU, Chan-Chung CHENG, Chun-Chen LIU, Cheng-Hung CHEN, Peng-Ren CHEN, Wen-Hao CHENG, Jong-l MOU
  • Patent number: 11935675
    Abstract: An anti-surge resistor and a fabrication method thereof are provided. The current anti-surge resistor includes a substrate made by a varistor material, a resistance layer disposed on the substrate, a first terminal electrode, and a second terminal electrode. In the fabrication method of the current anti-surge resistor, at first, the substrate made by the varistor material is provided. Then, the resistance layer is formed on the substrate to provide a main body, in which the main body includes the substrate and the resistance layer, and has two opposite terminals. Thereafter, the first terminal electrode is formed on one terminal of the main body, and the second terminal electrode is formed on the other terminal of the main body.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: March 19, 2024
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Kuang-Cheng Lin, Ren-Hong Wang
  • Publication number: 20240057964
    Abstract: Introduced here are computer programs and associated computer-implemented techniques for deriving insights into the health of patients through analysis of audio data generated by electronic stethoscope systems. A diagnostic platform may be responsible for examining the audio data generated by an electronic stethoscope system so as to gain insights into the health of a patient. The diagnostic platform may employ heuristics, algorithms, or models that rely on machine learning or artificial intelligence to perform auscultation in a manner that significantly outperforms traditional approaches that rely on visual analysis by a healthcare professional.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 22, 2024
    Inventors: Yuan Ren Cheng, Fushun Hsu, Ji-De Huang, Shang-Ran Huang
  • Publication number: 20240057965
    Abstract: Introduced here are computer programs and associated computer-implemented techniques for deriving insights into the health of patients through analysis of audio data generated by electronic stethoscope systems. A diagnostic platform may be responsible for examining the audio data generated by an electronic stethoscope system so as to gain insights into the health of a patient. The diagnostic platform may employ heuristics, algorithms, or models that rely on machine learning or artificial intelligence to perform auscultation in a manner that significantly outperforms traditional approaches that rely on visual analysis by a healthcare professional.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 22, 2024
    Inventors: Yuan Ren Cheng, Fushun Hsu, Ji-De Huang, Shang-Ran Huang
  • Patent number: 11897759
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Po Chen Yeh, Yi-Hsien Chang, Fu-Chun Huang, Ching-Hui Lin, Chiahung Liu, Shih-Fen Huang, Chun-Ren Cheng
  • Publication number: 20230399225
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11834325
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. A first piezoelectric anti-stiction structure is disposed between the movable mass and the first dielectric structure, wherein the first piezoelectric anti-stiction structure includes a first piezoelectric structure and a first electrode disposed between the first piezoelectric structure and the first dielectric structure.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: December 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fan Hu, Chun-Ren Cheng, Hsiang-Fu Chen, Wen-Chuan Tai
  • Publication number: 20230387164
    Abstract: The present disclosure relates to an integrated chip including a semiconductor layer and a photodetector disposed along the semiconductor layer. A color filter is over the photodetector. A micro-lens is over the color filter. A dielectric structure comprising one or more dielectric layers is over the micro-lens. A receptor layer is over the dielectric structure. An optical signal enhancement structure is disposed along the dielectric structure and between the receptor layer and the micro-lens.
    Type: Application
    Filed: May 25, 2022
    Publication date: November 30, 2023
    Inventors: Yi-Hsien Chang, Shih-Fen Huang, Chun-Ren Cheng, Fu-Chun Huang, Ching-Hui Lin
  • Publication number: 20230375500
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicant: Tawian Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Cheng Huang, Yi-Hsien Chang, Chin-Hua Wen, Chun-Ren Cheng, Shih-Fen Huang, Tung-Tsun Chen, Yu-Jie Huang, Ching-Hui Lin, Sean Cheng, Hector Chang
  • Publication number: 20230373780
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 23, 2023
    Inventors: Fan Hu, Chun-Ren Cheng, Hsiang-Fu Chen, Wen-Chuan Tai
  • Publication number: 20230375501
    Abstract: A method of making a biochip includes forming an opening extending completely through a fluidic substrate. Forming the opening includes defining a plurality of sidewalls on the fluidic substrate, wherein the plurality of sidewalls defines a channel in fluid communication with the opening, and each of the plurality of sidewalls comprises polydimethylsiloxane (PDMS). The method further includes coating a surface of the fluidic substrate with a silicon oxide coating wherein, the silicon oxide coating is between adjacent sidewalls of the plurality of sidewalls. The method further includes bonding the fluidic substrate to a detection substrate.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Yi-Shao LIU, Chun-Ren CHENG, Chun-Wen CHENG
  • Publication number: 20230365403
    Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer, wherein the formation of the plurality of scribe lines includes removing portions of the second wafer from the second surface towards the first surface to form a third surface between the first surface and the second surface, and the plurality of scribe lines protrudes from the third surface of the second wafer.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Inventors: WEI-CHENG SHEN, YI-HSIEN CHANG, YI-HENG TSAI, CHUN-REN CHENG