Patents by Inventor Renee Tong Mo
Renee Tong Mo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7993995Abstract: Metal-oxide semiconductor field effect transistor (MOSFET) devices having metal gate stacks and techniques for improving performance thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate having a buried oxide layer at least a portion of which is configured to serve as a primary background oxygen getterer of the device; and a gate stack separated from the substrate by an interfacial oxide layer. The gate stack comprises a high-K layer over the interfacial oxide layer; and a metal gate layer over the high-K layer.Type: GrantFiled: January 5, 2010Date of Patent: August 9, 2011Assignee: International Business Machines CorporationInventors: Amlan Majumdar, Renee Tong Mo, Zhibin Ren, Jeffrey Sleight
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Patent number: 7960795Abstract: Metal-oxide semiconductor (MOS) devices and techniques for the fabrication thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate; and at least one n-channel field effect transistor (NFET) having a gate stack over the substrate. The NFET gate stack comprises an NFET gate stack metal gate layer; a first NFET gate stack silicon layer over the NFET gate stack metal gate layer; a second NFET gate stack silicon layer over a side of the first NFET gate stack silicon layer opposite the NFET gate stack metal gate layer, wherein an interface is defined between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; and an NFET gate stack silicide region that extends through the interface between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer.Type: GrantFiled: May 18, 2010Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Leland Chang, Renee Tong Mo, Jeffrey W. Sleight
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Publication number: 20100224940Abstract: Metal-oxide semiconductor (MOS) devices and techniques for the fabrication thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate; and at least one n-channel field effect transistor (NFET) having a gate stack over the substrate. The NFET gate stack comprises an NFET gate stack metal gate layer; a first NFET gate stack silicon layer over the NFET gate stack metal gate layer; a second NFET gate stack silicon layer over a side of the first NFET gate stack silicon layer opposite the NFET gate stack metal gate layer, wherein an interface is defined between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; and an NFET gate stack silicide region that extends through the interface between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer.Type: ApplicationFiled: May 18, 2010Publication date: September 9, 2010Applicant: International Business Machines CorporationInventors: Leland Chang, Renee Tong Mo, Jeffrey W. Sleight
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Patent number: 7785952Abstract: Metal-oxide semiconductor (MOS) devices and techniques for the fabrication thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate; and at least one n-channel field effect transistor (NFET) having a gate stack over the substrate. The NFET gate stack comprises an NFET gate stack metal gate layer; a first NFET gate stack silicon layer over the NFET gate stack metal gate layer; a second NFET gate stack silicon layer over a side of the first NFET gate stack silicon layer opposite the NFET gate stack metal gate layer, wherein an interface is defined between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; and an NFET gate stack silicide region that extends through the interface between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer.Type: GrantFiled: October 16, 2007Date of Patent: August 31, 2010Assignee: International Business Machines CorporationInventors: Leland Chang, Renee Tong Mo, Jeffrey W. Sleight
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Patent number: 7776624Abstract: A semiconductor fabrication method. The method includes providing a semiconductor substrate, wherein the semiconductor substrate includes a semiconductor material. Next, a top portion of the semiconductor substrate is removed. Next, a first semiconductor layer is epitaxially grown on the semiconductor substrate, wherein a first atomic percent of a first semiconductor material in the first semiconductor layer is equal to a substrate atomic percent of the substrate semiconductor material in the semiconductor substrate.Type: GrantFiled: July 8, 2008Date of Patent: August 17, 2010Assignee: International Business Machines CorporationInventors: Ashima B. Chakravarti, Judson Robert Holt, Jeremy John Kempisty, Suk Hoon Ku, Woo-Hyeong Lee, Amlan Majumdar, Ryan Matthew Mitchell, Renee Tong Mo, Zhibin Ren, Dinkar Singh
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Patent number: 7767579Abstract: A method of making a semiconductor device includes forming a transistor structure having one of an embedded epitaxial stressed material in a source and drain region and a stressed channel and well, subjecting the transistor structure to plasma oxidation, and removing spacer material from the transistor structure.Type: GrantFiled: December 12, 2007Date of Patent: August 3, 2010Assignee: International Business Machines CorporationInventors: Ashima B Chakravarti, Zhijiong Luo, Renee Tong Mo, Shreesh Narasimha, Katsunori Onishi
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Publication number: 20100140707Abstract: Metal-oxide semiconductor field effect transistor (MOSFET) devices having metal gate stacks and techniques for improving performance thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate having a buried oxide layer at least a portion of which is configured to serve as a primary background oxygen getterer of the device; and a gate stack separated from the substrate by an interfacial oxide layer. The gate stack comprises a high-K layer over the interfacial oxide layer; and a metal gate layer over the high-K layer.Type: ApplicationFiled: January 5, 2010Publication date: June 10, 2010Applicant: International Business Machines CorporationInventors: Amlan Majumdar, Renee Tong Mo, Zhibin Ren, Jeffrey Sleight
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Patent number: 7648868Abstract: Metal-oxide semiconductor field effect transistor (MOSFET) devices having metal gate stacks and techniques for improving performance thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate having a buried oxide layer at least a portion of which is configured to serve as a primary background oxygen getterer of the device; and a gate stack separated from the substrate by an interfacial oxide layer. The gate stack comprises a high-K layer over the interfacial oxide layer; and a metal gate layer over the high-K layer.Type: GrantFiled: October 31, 2007Date of Patent: January 19, 2010Assignee: International Business Machines CorporationInventors: Amlan Majumdar, Renee Tong Mo, Zhibin Ren, Jeffrey Sleight
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Publication number: 20100009524Abstract: A semiconductor fabrication method. The method includes providing a semiconductor substrate, wherein the semiconductor substrate includes a semiconductor material. Next, a top portion of the semiconductor substrate is removed. Next, a first semiconductor layer is epitaxially grown on the semiconductor substrate, wherein a first atom percent of the semiconductor material in the first semiconductor layer is equal to a certain atom percent of the semiconductor material in the semiconductor substrate.Type: ApplicationFiled: July 8, 2008Publication date: January 14, 2010Applicant: INTERNATIONAL BUSINESS MACHINESInventors: Ashima B. Chakravarti, Judson Robert Holt, Jeremy John Kempisty, Suk Hoon Ku, Woo-Hyeong Lee, Amlan Majumdar, Ryan Matthew Mitchell, Renee Tong Mo, Zhibin Ren, Dinkar Singh
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Publication number: 20090155969Abstract: A method of making a semiconductor device includes forming a transistor structure having one of an embedded epitaxial stressed material in a source and drain region and a stressed channel and well, subjecting the transistor structure to plasma oxidation, and removing spacer material from the transistor structure.Type: ApplicationFiled: December 12, 2007Publication date: June 18, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: ASHIMA B. CHAKRAVARTI, ZHIJIONG LUO, RENEE TONG MO, SHREESH NARASIMHA, KATSUNORI ONISHI
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Publication number: 20090108352Abstract: Metal-oxide semiconductor field effect transistor (MOSFET) devices having metal gate stacks and techniques for improving performance thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate having a buried oxide layer at least a portion of which is configured to serve as a primary background oxygen getterer of the device; and a gate stack separated from the substrate by an interfacial oxide layer. The gate stack comprises a high-K layer over the interfacial oxide layer; and a metal gate layer over the high-K layer.Type: ApplicationFiled: October 31, 2007Publication date: April 30, 2009Applicant: International Business Machines CorporationInventors: Amlan Majumdar, Renee Tong Mo, Zhibin Ren, Jeffrey Sleight
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Publication number: 20090096034Abstract: Metal-oxide semiconductor (MOS) devices and techniques for the fabrication thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate; and at least one n-channel field effect transistor (NFET) having a gate stack over the substrate. The NFET gate stack comprises an NFET gate stack metal gate layer; a first NFET gate stack silicon layer over the NFET gate stack metal gate layer; a second NFET gate stack silicon layer over a side of the first NFET gate stack silicon layer opposite the NFET gate stack metal gate layer, wherein an interface is defined between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; and an NFET gate stack silicide region that extends through the interface between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer.Type: ApplicationFiled: October 16, 2007Publication date: April 16, 2009Applicant: International Business Machines CorporationInventors: Leland Chang, Renee Tong Mo, Jeffrey W. Sleight