Patents by Inventor Rennier Rodriguez
Rennier Rodriguez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230253213Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.Type: ApplicationFiled: April 19, 2023Publication date: August 10, 2023Applicant: STMicroelectronics, Inc.Inventors: Rennier RODRIGUEZ, Maiden Grace MAMING, Jefferson Sismundo TALLEDO
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Patent number: 11688715Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.Type: GrantFiled: September 20, 2021Date of Patent: June 27, 2023Assignee: STMicroelectronics, Inc.Inventors: Rennier Rodriguez, Rammil Seguido, Raymond Albert Narvadez, Michael Tabiera
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Patent number: 11664239Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.Type: GrantFiled: May 11, 2021Date of Patent: May 30, 2023Assignee: STMicroelectronics, Inc.Inventors: Rennier Rodriguez, Maiden Grace Maming, Jefferson Talledo
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Patent number: 11552007Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.Type: GrantFiled: February 25, 2021Date of Patent: January 10, 2023Assignee: STMicroelectronics, Inc.Inventors: Rennier Rodriguez, Aiza Marie Agudon, Jefferson Talledo, Moonlord Manalo, Ela Mia Cadag, Rammil Seguido
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Patent number: 11404355Abstract: A semiconductor package includes a lead frame, a die, a discrete electrical component, and electrical connections. The lead frame includes leads and a die pad. Some of the leads include engraved regions that have recesses therein and the die pad may include an engraved region or multiple engraved regions. Each engraved region is formed to contain and confine a conductive adhesive from flowing over the edges of the engraved leads or the die pad. The boundary confines the conductive adhesive to the appropriate location on the engraved lead or the engraved die pad when being placed on the engraved regions. By utilizing a lead frame with engraved regions, the flow of the conductive adhesive or the wettability of the conductive adhesive can be contained and confined to the appropriate areas of the engraved lead or engraved die pad such that a conductive adhesive does not cause cross-talk between electrical components within a semiconductor package or short circuiting within a semiconductor package.Type: GrantFiled: July 31, 2020Date of Patent: August 2, 2022Assignees: STMICROELECTRONICS PTE LTD, STMICROELECTRONICS, INC.Inventors: Rennier Rodriguez, Bryan Christian Bacquian, Maiden Grace Maming, David Gani
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Publication number: 20220139845Abstract: The present disclosure is directed to a semiconductor package that include a non-conductive encapsulation layer encapsulation an integrated circuit chip, and a conductive encapsulation layer over the non-conductive encapsulation layer. A lead is exposed from the non-conductive encapsulation layer and contacts the conductive encapsulation layer. The conductive encapsulation layer and the lead provide EMI shielding for the integrated circuit chip.Type: ApplicationFiled: October 25, 2021Publication date: May 5, 2022Applicant: STMICROELECTRONICS, INC.Inventors: Endalicio MANALO, Rennier RODRIGUEZ
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Publication number: 20220005782Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.Type: ApplicationFiled: September 20, 2021Publication date: January 6, 2022Applicant: STMicroelectronics, Inc.Inventors: Rennier RODRIGUEZ, Rammil SEGUIDO, Raymond Albert NARVADEZ, Michael TABIERA
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Publication number: 20210391226Abstract: One or more embodiments are directed to semiconductor device packages having a cap with integrated metal interconnects or conductive leads. One embodiment is directed to a semiconductor device package that includes a cap having a cover extending along a first direction and sidewalls extending from the cover along a second direction that is transverse to the first direction. A plurality of electrical leads are disposed on inner surfaces of the sidewalls and extend over lower surfaces of the sidewalls. A semiconductor die is attached to an inner surface of the cover of the cap, and the semiconductor die is electrically coupled to the plurality of electrical leads.Type: ApplicationFiled: June 14, 2021Publication date: December 16, 2021Applicant: STMICROELECTRONICS, INC.Inventors: Rennier RODRIGUEZ, John Alexander SORIANO, Aaron CADAG
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Patent number: 11152326Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.Type: GrantFiled: October 25, 2019Date of Patent: October 19, 2021Assignee: STMicroelectronics, Inc.Inventors: Rennier Rodriguez, Rammil Seguido, Raymond Albert Narvadez, Michael Tabiera
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Publication number: 20210265245Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.Type: ApplicationFiled: May 11, 2021Publication date: August 26, 2021Inventors: Rennier RODRIGUEZ, Maiden Grace MAMING, Jefferson TALLEDO
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Publication number: 20210183750Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.Type: ApplicationFiled: February 25, 2021Publication date: June 17, 2021Applicant: STMicroelectronics, Inc.Inventors: Rennier RODRIGUEZ, Aiza Marie AGUDON, Jefferson TALLEDO, Moonlord MANALO, Ela Mia CADAG, Rammil SEGUIDO
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Patent number: 11037864Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.Type: GrantFiled: February 1, 2019Date of Patent: June 15, 2021Assignee: STMicroelectronics, Inc.Inventors: Rennier Rodriguez, Maiden Grace Maming, Jefferson Talledo
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Publication number: 20210151368Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.Type: ApplicationFiled: December 31, 2020Publication date: May 20, 2021Inventors: Rennier RODRIGUEZ, Aiza Marie AGUDON, Maiden Grace MAMING
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Publication number: 20210111109Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.Type: ApplicationFiled: December 22, 2020Publication date: April 15, 2021Inventors: Rennier RODRIGUEZ, Aiza Marie AGUDON, Maiden Grace MAMING
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Patent number: 10957634Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.Type: GrantFiled: February 25, 2020Date of Patent: March 23, 2021Assignee: STMICROELECTRONICS, INC.Inventors: Rennier Rodriguez, Aiza Marie Agudon, Jefferson Talledo, Moonlord Manalo, Ela Mia Cadag, Rammil Seguido
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Patent number: 10892212Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.Type: GrantFiled: November 9, 2017Date of Patent: January 12, 2021Assignee: STMICROELECTRONICS, INC.Inventors: Rennier Rodriguez, Aiza Marie Agudon, Maiden Grace Maming
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Publication number: 20200365492Abstract: A semiconductor package includes a lead frame, a die, a discrete electrical component, and electrical connections. The lead frame includes leads and a die pad. Some of the leads include engraved regions that have recesses therein and the die pad may include an engraved region or multiple engraved regions. Each engraved region is formed to contain and confine a conductive adhesive from flowing over the edges of the engraved leads or the die pad. The boundary confines the conductive adhesive to the appropriate location on the engraved lead or the engraved die pad when being placed on the engraved regions. By utilizing a lead frame with engraved regions, the flow of the conductive adhesive or the wettability of the conductive adhesive can be contained and confined to the appropriate areas of the engraved lead or engraved die pad such that a conductive adhesive does not cause cross-talk between electrical components within a semiconductor package or short circuiting within a semiconductor package.Type: ApplicationFiled: July 31, 2020Publication date: November 19, 2020Inventors: Rennier RODRIGUEZ, Bryan Christian BACQUIAN, Maiden Grace MAMING, David GANI
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Patent number: 10796984Abstract: The present disclosure is directed to a leadframe package having leads with protrusions on an underside of the leadframe. The protrusions come in various shapes and sizes. The protrusions extend from a body of encapsulant around the leadframe to couple to surface contacts on a substrate. The protrusions have a recess that is filled with encapsulant. Additionally, the protrusions may be part of the lead or may be a conductive layer on the lead. In some embodiments a die pad of the leadframe supporting a semiconductor die also has a protrusion on the underside of the leadframe. The protrusion on the die pad has a recess that houses an adhesive and at least part of the semiconductor die. The die pad with a protrusion may include anchor locks at the ends of the die pad to couple to the encapsulant.Type: GrantFiled: January 16, 2019Date of Patent: October 6, 2020Assignee: STMICROELECTRONICS, INC.Inventors: Rennier Rodriguez, Raymond Albert Narvadez, Ernesto Antilano, Jr.
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Patent number: 10763194Abstract: A semiconductor package includes a lead frame, a die, a discrete electrical component, and electrical connections. The lead frame includes leads and a die pad. Some of the leads include engraved regions that have recesses therein and the die pad may include an engraved region or multiple engraved regions. Each engraved region is formed to contain and confine a conductive adhesive from flowing over the edges of the engraved leads or the die pad. The boundary confines the conductive adhesive to the appropriate location on the engraved lead or the engraved die pad when being placed on the engraved regions. By utilizing a lead frame with engraved regions, the flow of the conductive adhesive or the wettability of the conductive adhesive can be contained and confined to the appropriate areas of the engraved lead or engraved die pad such that a conductive adhesive does not cause cross-talk between electrical components within a semiconductor package or short circuiting within a semiconductor package.Type: GrantFiled: September 22, 2017Date of Patent: September 1, 2020Assignees: STMICROELECTRONICS, INC., STMICROELECTRONICS PTE LTDInventors: Rennier Rodriguez, Bryan Christian Bacquian, Maiden Grace Maming, David Gani
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Publication number: 20200194355Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.Type: ApplicationFiled: February 25, 2020Publication date: June 18, 2020Inventors: Rennier RODRIGUEZ, Aiza Marie AGUDON, Jefferson TALLEDO, Moonlord MANALO, Ela Mia CADAG, Rammil SEGUIDO