Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.

Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.

Abstract: A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.

Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.

Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.

Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.

Abstract: An apparatus, comprising, a MOSFET, a controller coupled to the MOSFET, an inductor conductively coupled to the MOSFET. A reported current output of the controller is adjusted based on a predetermined excursion of an attribute of the inductor from a fixed attribute value.

Abstract: A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.

Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.

Abstract: An apparatus, comprising, a MOSFET, a controller coupled to the MOSFET, an inductor conductively coupled to the MOSFET. A reported current output of the controller is adjusted based on a predetermined excursion of an attribute of the inductor from a fixed attribute value.

Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.

Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.

Abstract: A system and method capable of injection locking the phases of a peak-valley multiphase regulator includes comparing an output voltage error signal with a ramp control signal and providing a corresponding slope reset signal, using transitions of the slope reset signal to develop a equally spaced high side ramp signals and equally spaced low side ramp signals, and injecting a corresponding one of the high side signals and a corresponding one of the low side ramp signals into each of the phases which correspondingly develop equally spaced pulse control signals for multiphase operation. Such injection locking allows the additional phases to operate out of phase with the first phase and allows operation at high duty cycles.

Abstract: A modulator for controlling a switch circuit of a voltage regulator, including a sense circuit that provides a current sense signal indicative of current through the output inductor, a ramp circuit that develops a ramp voltage on a ramp node using the current sense signal, an error circuit that develops an error signal indicative of output voltage error and that injects the error signal into the ramp node to adjust the ramp voltage, a comparator circuit that compares the ramp voltage with a fixed control voltage to develop a compare signal, and a logic circuit that uses the compare signal to develop a pulse control signal that controls the switch circuit. The output voltage error may be determined by comparing the output voltage with a reference voltage and converting the error voltage to a current applied to the ramp node.

Abstract: A regulator system with dynamic droop including a regulator control network which is adapted to control regulation of an output voltage to a reference level, a DC droop network which provides a droop signal to modify the reference level based on output load according to a predetermined DC load line, and a dynamic droop network which adjusts the droop signal to delay recovery to the predetermined DC load line within an AC load line tolerance in response to a load transient. A transient reduction network may be included to reduce transient overshoot for load insertion or release depending upon duty cycle type. The dynamic droop network adjusts the droop signal to optimize utilization of an AC delay parameter while transitioning between an AC offset voltage allowance and the predetermined DC load line.

Abstract: A modulator for controlling a switch circuit of a voltage regulator, including a sense circuit that provides a current sense signal indicative of current through the output inductor, a ramp circuit that develops a ramp voltage on a ramp node using the current sense signal, an error circuit that develops an error signal indicative of output voltage error and that injects the error signal into the ramp node to adjust the ramp voltage, a comparator circuit that compares the ramp voltage with a fixed control voltage to develop a compare signal, and a logic circuit that uses the compare signal to develop a pulse control signal that controls the switch circuit. The output voltage error may be determined by comparing the output voltage with a reference voltage and converting the error voltage to a current applied to the ramp node.

Abstract: An equivalent series inductance (ESL) cancel circuit for a regulator for adjusting a feedback voltage by attenuating a magnitude of a square wave ripple voltage developed on an output voltage. The regulator includes an output inductor and an output capacitor, in which the capacitor has an ESL which forms an inductive voltage divider with the output inductor causing the square wave voltage ripple. The ESL cancel circuit may include first and second current sources and a resistor device coupled between the output node and an adjust node which is further coupled to a feedback input of the regulator. The first current source applies a current proportional to the output voltage to the adjust node. The second current source selectively applies a current proportional to the input voltage of the regulator based on a state of the pulse control signal.

Abstract: A modulator with balanced slope compensation including a control network, a slope compensation network, an offset network and an adjust network. The control network receives a feedback signal indicative of an output voltage and provides a loop control signal. The slope compensation network develops a slope compensation signal. The offset network determines a DC offset of the slope compensation signal. The adjust network combines the DC offset, the slope compensation signal and the loop control signal to provide a balanced slope compensated control signal. The DC offset may be determined as a peak of the slope compensation signal. The slope compensation signal may be developed based on the output voltage and a pulse control signal, in which the pulse control signal is developed using the balanced slope compensated control signal.

Abstract: A controller for a switch mode regulator with discontinuous conduction mode (DCM) correction which includes a correction network and a modulator. The correction network detects a low load condition indicative of regulation error during DCM and asserts an adjust value indicative thereof. The modulator receives the adjust value and adjusts operation accordingly to improve regulation during DCM. The correction network receives or determines a regulation metric, such as periods between successive pulses of a pulse control signal, or a current sense signal indicative of load current, and compares the regulation metric with one or more thresholds for determining the level of adjustment. Adjustment may be made using one or more methods, such as adjusting pulse on-time, adjusting pulse off-time, adjusting frequency of operation, etc.

Abstract: An equivalent series inductance (ESL) cancel circuit for a regulator for adjusting a feedback voltage by attenuating a magnitude of a square wave ripple voltage developed on an output voltage. The regulator includes an output inductor and an output capacitor, in which the capacitor has an ESL which forms an inductive voltage divider with the output inductor causing the square wave voltage ripple. The ESL cancel circuit may include first and second current sources and a resistor device coupled between the output node and an adjust node which is further coupled to a feedback input of the regulator. The first current source applies a current proportional to the output voltage to the adjust node. The second current source selectively applies a current proportional to the input voltage of the regulator based on a state of the pulse control signal.