Abstract: Leadless power amplifier (PA) packages having topside termination interposer (TTI) arrangements, and associated fabrication methods, are disclosed. Embodiments of the leadless PA package include a base flange, a first set of interposer mount pads, a first RF power die, a package body. The first RF power die is attached to a die mount surface of the base flange and electrically interconnected with the first set of interposer mount pads. The TTI arrangement is electrically coupled to the first set of interposer mount pads and projects therefrom in the package height direction. The package body encloses the first RF power die and having a package topside surface opposite the lower flange surface. Topside input/output terminals of the PA package are accessible from the package topside surface and are electrically interconnected with the first RF power die through the TTI arrangement and the first set of interposer mount pads.

Abstract: Power amplifier (PA) packages, such as Doherty PA packages, containing multi-path integrated passive devices (IPDs) are disclosed. In embodiments, the PA package includes a package body through which first and second signal amplification paths extend, a first amplifier die within the package body and positioned in the first signal amplification path, and a second amplifier die within the package body and positioned in the second signal amplification path. A multi-path IPD is further contained in the package body. The multi-path IPD includes a first IPD region through which the first signal amplification path extends, a second IPD region through which the second signal amplification path extends, and an isolation region formed in the IPD substrate a location intermediate the first IPD region and the second IPD region.

Abstract: Doherty power amplifier (PA) devices (e.g., packages and modules) including integrated output combining networks are disclosed. In embodiments, the Doherty PA device includes a first amplifier die having a first transistor with a first output terminal at which a first amplified signal is generated, a second amplifier die having a second transistor with a second output terminal at which a second amplified signal is generated, and an output combining network. The output combining network includes, in turn, a combining node integrally formed with the second amplifier die and electrically coupled to the second output terminal. At least one die-to-die bond wire electrically couples the first output terminal to the combining node. The at least one die-to-die bond wire has an electrical length, which is results in a 90 degree phase shift imparted to the first amplified signal between the first output terminal and the combining node.

Abstract: Power amplifier (PA) packages, such as Doherty PA packages, containing multi-path integrated passive devices (IPDs) are disclosed. In embodiments, the PA package includes a package body through which first and second signal amplification paths extend, a first amplifier die within the package body and positioned in the first signal amplification path, and a second amplifier die within the package body and positioned in the second signal amplification path. A multi-path IPD is further contained in the package body. The multi-path IPD includes a first IPD region through which the first signal amplification path extends, a second IPD region through which the second signal amplification path extends, and an isolation region formed in the IPD substrate a location intermediate the first IPD region and the second IPD region.

Abstract: A packaged radio frequency (RF) amplifier device includes a flange and a transistor die mounted to the flange. The transistor die includes an output terminal. The packaged RF amplifier device includes a first bond wire array including a first plurality of bond wires. Each bond wire in the first plurality of bond wires is electrically coupled to the output terminal of the transistor die. A first ground loop area of a first bond wire in the first plurality of bond wires is greater than a second ground loop area of a second bond wire in the first plurality of bond wires.

Abstract: Doherty power amplifier (PA) devices (e.g., packages and modules) including integrated output combining networks are disclosed. In embodiments, the Doherty PA device includes a first amplifier die having a first transistor with a first output terminal at which a first amplified signal is generated, a second amplifier die having a second transistor with a second output terminal at which a second amplified signal is generated, and an output combining network. The output combining network includes, in turn, a combining node integrally formed with the second amplifier die and electrically coupled to the second output terminal. At least one die-to-die bond wire electrically couples the first output terminal to the combining node. The at least one die-to-die bond wire has an electrical length, which is results in a 90 degree phase shift imparted to the first amplified signal between the first output terminal and the combining node.

Abstract: The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. Specifically, the amplifiers described herein include one or more transient termination circuits coupled to transistor inputs. For example, the transient termination circuits can be configured to reduce the transient response for some signal energy at frequencies below a baseband frequency (fB) of signals being amplified while not similarly reducing the transient response for signal energy near a fundamental frequency (f0) of the signals being amplified.

Abstract: A packaged radio frequency (RF) amplifier device includes a flange and a transistor die mounted to the flange. The transistor die includes an output terminal. The packaged RF amplifier device includes a first bond wire array including a first plurality of bond wires. Each bond wire in the first plurality of bond wires is electrically coupled to the output terminal of the transistor die. A first ground loop area of a first bond wire in the first plurality of bond wires is greater than a second ground loop area of a second bond wire in the first plurality of bond wires.

Abstract: The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. Specifically, the amplifiers described herein include one or more transient termination circuits coupled to transistor inputs. For example, the transient termination circuits can be configured to reduce the transient response for some signal energy at frequencies below a baseband frequency (fB) of signals being amplified while not similarly reducing the transient response for signal energy near a fundamental frequency (f0) of the signals being amplified.

Abstract: A radio frequency (RF) amplifier circuit includes a field effect transistor (FET) (e.g., a FET belonging to a III-V FET enhancement group), where the FET includes a gate terminal coupled to an RF input node. The circuit further includes a prematch and biasing network coupled between a bias voltage node and the RF input node. The prematch and biasing network includes a nonlinear gate current blocking device configured to block a current from flowing between the bias voltage node and the RF input node.

Abstract: A bond pad structure and method are provided. The structure includes a first conductive layer formed over a substrate. A second conductive layer is formed over a first portion of the first conductive layer, and a first portion of the second conductive layer forms a first capacitor electrode. A third conductive layer is formed over the first conductive layer and second conductive layer, and a first portion of the third conductive layer forms a second capacitor electrode. A second portion of the third conductive layer forms a wire bond region. A dielectric material is disposed between the first capacitor electrode and the second capacitor electrode to form a first capacitor.

Abstract: A radio frequency (RF) amplifier circuit includes a field effect transistor (FET) (e.g., a FET belonging to a III-V FET enhancement group), where the FET includes a gate terminal coupled to an RF input node. The circuit further includes a prematch and biasing network coupled between a bias voltage node and the RF input node. The prematch and biasing network includes a nonlinear gate current blocking device configured to block a current from flowing between the bias voltage node and the RF input node.

Abstract: A bond pad structure and method are provided. The structure includes a first conductive layer formed over a substrate. A second conductive layer is formed over a first portion of the first conductive layer, and a first portion of the second conductive layer forms a first capacitor electrode. A third conductive layer is formed over the first conductive layer and second conductive layer, and a first portion of the third conductive layer forms a second capacitor electrode. A second portion of the third conductive layer forms a wire bond region. A dielectric material is disposed between the first capacitor electrode and the second capacitor electrode to form a first capacitor.

Abstract: A multiple-stage amplifier includes a driver stage die and a final stage die. The final stage die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a first transistor. The driver stage die includes another type of semiconductor substrate (e.g., a silicon substrate), a second transistor, and one or more secondary circuits that are electrically coupled to a control terminal of the first transistor. A connection (e.g., a wirebond array or other DC-coupled connection) is electrically coupled between an RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die. The secondary circuit(s) of the driver stage die include a final stage bias circuit and/or a final stage harmonic control circuit, which are electrically connected to the final stage die through various connections.

Abstract: Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit includes a first shunt inductive element, a second shunt inductance, and a shunt capacitor coupled in series. Instead of a separate inductive element, the second shunt inductance may be achieved via magnetic coupling of the first shunt inductive element and an envelope inductive element of a video bandwidth circuit that is coupled between an RF cold point node (between the first and second shunt inductances) and the ground. Alternatively, an envelope inductance in the video bandwidth circuit may be achieved via magnetic coupling of first and second shunt inductive elements. A better RF cold point may be achieved without physically incorporating separate inductive elements, allowing for reduction in cost and size.

Abstract: A packaged RF amplifier device includes a transistor, a first input circuit, and a second input circuit. The first input circuit includes a first series inductance coupled between an input lead and a first node, a second series inductance coupled between the first node and the transistor's control terminal, and a first shunt capacitance coupled between the first node and a ground reference. The second input circuit includes a first shunt inductance and a second shunt capacitance coupled in series between the input lead and the ground reference. The first input circuit and the second input circuit create a fundamental frequency match for the device. The second series inductance and the first shunt capacitance present a short circuit to the ground reference for RF energy at a second harmonic frequency.

Abstract: A transceiver includes a harmonic termination circuit that receives a tunable harmonic voltage from a power amplifier control. The harmonic termination circuit includes a variable capacitor that is capable of adjusting its capacitance in response to the tunable harmonic termination voltage to achieve at least two modes of operation. The at least two modes of operation may be EDGE mode and GSM mode. In this embodiment, the harmonic termination circuit allows for linearity specifications of EDGE to be met, while not degrading the efficiency of the transceiver when operating in GSM mode. In one embodiment, the harmonic termination circuit further includes an inductive element in series with the variable capacitor.

Abstract: A power amplifier (PA) line-up (210) and a method (500) for more efficiently utilizing battery power are disclosed. PA line-up (210) includes a driver (220), a matching circuit (214), and a PA (230) coupled to a matching circuit (216), wherein matching circuit (216) is configured to be coupled to a filter (260). PA line-up (210) includes a transmission line (260) coupled to matching circuit (216) and a switch (262) configured to selectively couple driver (220) to either matching circuit (214) or matching circuit (216) such that signal (205) is capable of by-passing PA (230) when signal (205) does not need to be amplified by PA (230). Furthermore, PA line-up (210) may include a second transmission line (250) so that signal (205) is capable of by-passing a driver (220) and a PA (230) when signal (205) does not need to be amplified by driver (220) and PA (230).

Abstract: A device 20 includes a substrate 22 having an integrated circuit (IC) die 24 coupled thereto. A bond wire 28 interconnects a die bond pad 32 on the IC die 24 with an insulated bond pad 36. Another bond wire 38 interconnects a die bond pad 42 on the IC die 24 with another insulated bond pad 46. The bond wires 28 and 38 serve as radiating elements of a dipole antenna structure 64. A reflector 72 and director 74 can be located on the substrate 22 and/or the IC die 24 to reflect and/or direct a radiation pattern 66 emitted by or received by the antenna structure 64. A trace 82 can be interconnected between the insulated bond pads 36, 46 to form a folded dipole antenna structure 84.

Abstract: A device 20 includes a substrate 22 having an integrated circuit (IC) die 24 coupled thereto. A bond wire 28 interconnects a die bond pad 32 on the IC die 24 with an insulated bond pad 36. Another bond wire 38 interconnects a die bond pad 42 on the IC die 24 with another insulated bond pad 46. The bond wires 28 and 38 serve as radiating elements of a dipole antenna structure 64. A reflector 72 and director 74 can be located on the substrate 22 and/or the IC die 24 to reflect and/or direct a radiation pattern 66 emitted by or received by the antenna structure 64. A trace 82 can be interconnected between the insulated bond pads 36, 46 to form a folded dipole antenna structure 84.