Patents by Inventor Richard Broadhurst

Richard Broadhurst has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10733796
    Abstract: A method of processing primitives within a tiling unit of a graphics processing system is described. The method comprises determining whether a primitive falls within a tile based on positions of samples within each pixel. If it is determined that the primitive does fall within a tile based on the positions of samples within pixels in a tile, an association between the tile and the primitive is stored to indicate that the primitive is present in the tile. For example, an identifier for the primitive may be added to a control stream for the tile to indicate that the primitive is present in the tile. Various different methods are described to make the determination and these may be used separately or in any combination.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: August 4, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Xile Yang, Lorenzo Belli, Richard Broadhurst
  • Publication number: 20200201676
    Abstract: A method of scheduling tasks in a processor comprises receiving a plurality of tasks that are ready to be executed, i.e. all their dependencies have been met and all the resources required to execute the task are available, and adding the received tasks to a task queue (or “task pool”). The number of tasks that are executing is monitored and in response to determining that an additional task can be executed by the processor, a task is selected from the task pool based at least in part on a comparison of indications of resources used by tasks being executed and indications of resources used by individual tasks in the task pool and the selected task is then sent for execution.
    Type: Application
    Filed: December 23, 2019
    Publication date: June 25, 2020
    Inventors: Isuru Herath, Richard Broadhurst
  • Publication number: 20200202595
    Abstract: The graphics processing unit described herein is configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles. The graphics processing unit comprises a tiling unit and rendering logic. The tiling unit is arranged to generate a tile control list for each tile, the tile control list identifying each graphics data item present in the tile. The rendering logic is arranged to render the tiles using the tile control lists generated by the tiling unit. The tiling unit comprises per-tile hash generation logic arranged to generate, for each tile, a per-tile hash value based on a set of textures that will be accessed when processing the tile in the rendering logic, and the tiling unit is further arranged to store the per-tile hash value for a tile within the tile control list for the tile.
    Type: Application
    Filed: December 23, 2019
    Publication date: June 25, 2020
    Inventors: Isuru Herath, Richard Broadhurst
  • Publication number: 20200167987
    Abstract: A graphics processing unit (GPU) processes graphics data using a rendering space which is sub-divided into a plurality of tiles. The GPU comprises cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space. The cost indication for a set of tile(s) is suggestive of a cost of processing the set of one or more tiles. The GPU controls a rendering complexity with which primitives are rendered in tiles based on the cost indication for those tiles. This allows tiles to be rendered in a manner that is suitable based on the complexity of the graphics data within the tiles. In turn, this allows the rendering to satisfy constraints such as timing constraints even when the complexity of different tiles may vary significantly within an image.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 28, 2020
    Inventors: John W. Howson, Richard Broadhurst, Steven Fishwick
  • Publication number: 20200082606
    Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitives, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will subsequently be hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.
    Type: Application
    Filed: November 13, 2019
    Publication date: March 12, 2020
    Inventors: Richard Broadhurst, John Howson, Robert Theed
  • Patent number: 10565772
    Abstract: A graphics processing unit (GPU) processes graphics data using a rendering space which is sub-divided into a plurality of tiles. The GPU comprises cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space. The cost indication for a set of tile(s) is suggestive of a cost of processing the set of one or more tiles. The GPU controls a rendering complexity with which primitives are rendered in tiles based on the cost indication for those tiles. This allows tiles to be rendered in a manner that is suitable based on the complexity of the graphics data within the tiles. In turn, this allows the rendering to satisfy constraints such as timing constraints even when the complexity of different tiles may vary significantly within an image.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: February 18, 2020
    Assignee: Imagination Technologies Limited
    Inventors: John W. Howson, Richard Broadhurst, Steven Fishwick
  • Publication number: 20200005423
    Abstract: A graphics processing unit configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles, the graphics processing unit comprising: a plurality of processing cores configured to render graphics data; cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing the set of one or more tiles; similarity indication logic configured to obtain similarity indications between sets of one or more tiles of the rendering space, wherein the similarity indication between two sets of one or more tiles is indicative of a level of similarity between the two sets of tiles according to at least one processing metric; and scheduling logic configured to assign the sets of one or more tiles to the processing cores for rendering in dependence on the cost indications and the similarity indications.
    Type: Application
    Filed: June 29, 2019
    Publication date: January 2, 2020
    Inventors: Rudi Bonfiglioli, Richard Broadhurst
  • Patent number: 10510182
    Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitive fragments, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will be subsequently hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: December 17, 2019
    Assignee: Imagination Technologies Limited
    Inventors: Richard Broadhurst, John Howson, Robert Theed
  • Publication number: 20190333185
    Abstract: A computing system comprises graphics rendering logic and image processing logic. The graphics rendering logic processes graphics data to render an image using a rendering space which is sub-divided into a plurality of tiles. Cost indication logic obtains a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing rendered image values for a region of the rendered image corresponding to the set of one or more tiles. The image processing logic processes rendered image values for regions of the rendered image. The computing system causes the image processing logic to process rendered image values for regions of the rendered image in dependence on the cost indications for the corresponding sets of one or more tiles.
    Type: Application
    Filed: July 10, 2019
    Publication date: October 31, 2019
    Inventors: John W. Howson, Richard Broadhurst, Steven Fishwick
  • Patent number: 10395336
    Abstract: A computing system comprises graphics rendering logic and image processing logic. The graphics rendering logic processes graphics data to render an image using a rendering space which is sub-divided into a plurality of tiles. Cost indication logic obtains a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing rendered image values for a region of the rendered image corresponding to the set of one or more tiles. The image processing logic processes rendered image values for regions of the rendered image. The computing system causes the image processing logic to process rendered image values for regions of the rendered image in dependence on the cost indications for the corresponding sets of one or more tiles.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: August 27, 2019
    Assignee: Imagination Technologies Limited
    Inventors: John W. Howson, Richard Broadhurst, Steven Fishwick
  • Patent number: 10387990
    Abstract: A graphics processing unit is configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles. The graphics processing unit comprises one or more processing cores configured to process graphics data. The graphics processing unit also comprises scheduling logic configured to subdivide at least one set of one or more tiles of the rendering space to form a plurality of subunits (e.g. subtiles) and to assign at least some of those subunits to different processing cores for rendering. The subdivision of tiles can be particularly useful for expensive tiles occurring near the end of a render to reduce the impact on the total render time when expensive tiles are scheduled near the end of a render.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: August 20, 2019
    Assignee: Imagination Technologies Limited
    Inventors: Richard Broadhurst, Steven Fishwick
  • Patent number: 10249016
    Abstract: A graphics processing unit is configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles. The graphics processing unit comprises one or more processing cores configured to process graphics data. The graphics processing unit also comprises cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing the set of one or more tiles. The graphics processing unit also comprises scheduling logic configured to schedule, in dependence upon the cost indications, the sets of one or more tiles for processing on the one or more processing cores.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: April 2, 2019
    Assignee: Imagination Technologies Limited
    Inventors: Richard Broadhurst, John W. Howson, Steven Fishwick
  • Publication number: 20190051047
    Abstract: A method of processing primitives within a tiling unit of a graphics processing system is described. The method comprises determining whether a primitive falls within a tile based on positions of samples within each pixel. If it is determined that the primitive does fall within a tile based on the positions of samples within pixels in a tile, an association between the tile and the primitive is stored to indicate that the primitive is present in the tile. For example, an identifier for the primitive may be added to a control stream for the tile to indicate that the primitive is present in the tile. Various different methods are described to make the determination and these may be used separately or in any combination.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 14, 2019
    Inventors: Xile Yang, Lorenzo Belli, Richard Broadhurst
  • Patent number: 10140761
    Abstract: A method of processing primitives within a tiling unit of a graphics processing system comprises determining whether a primitive falls within a tile based on positions of samples within each pixel. If it is determined that the primitive does fall within a tile based on the positions of samples within pixels in a tile, an association between the tile and the primitive is stored to indicate that the primitive is present in the tile. For example, an identifier for the primitive may be added to a control stream for the tile to indicate that the primitive is present in the tile. Various different methods are described to make the determination and these may be used separately or in any combination.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: November 27, 2018
    Assignee: Imagination Technologies Limited
    Inventors: Xile Yang, Lorenzo Belli, Richard Broadhurst
  • Publication number: 20180197270
    Abstract: A computing system comprises graphics rendering logic and image processing logic. The graphics rendering logic processes graphics data to render an image using a rendering space which is sub-divided into a plurality of tiles. Cost indication logic obtains a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing rendered image values for a region of the rendered image corresponding to the set of one or more tiles. The image processing logic processes rendered image values for regions of the rendered image. The computing system causes the image processing logic to process rendered image values for regions of the rendered image in dependence on the cost indications for the corresponding sets of one or more tiles.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 12, 2018
    Inventors: John W. Howson, Richard Broadhurst, Steven Fishwick
  • Publication number: 20180197323
    Abstract: A graphics processing unit (GPU) processes graphics data using a rendering space which is sub-divided into a plurality of tiles. The GPU comprises cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space. The cost indication for a set of tile(s) is suggestive of a cost of processing the set of one or more tiles. The GPU controls a rendering complexity with which primitives are rendered in tiles based on the cost indication for those tiles. This allows tiles to be rendered in a manner that is suitable based on the complexity of the graphics data within the tiles. In turn, this allows the rendering to satisfy constraints such as timing constraints even when the complexity of different tiles may vary significantly within an image.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 12, 2018
    Inventors: John W. Howson, Richard Broadhurst, Steven Fishwick
  • Publication number: 20180197271
    Abstract: A graphics processing unit is configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles. The graphics processing unit comprises one or more processing cores configured to process graphics data. The graphics processing unit also comprises cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing the set of one or more tiles. The graphics processing unit also comprises scheduling logic configured to schedule, in dependence upon the cost indications, the sets of one or more tiles for processing on the one or more processing cores.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 12, 2018
    Inventors: Richard Broadhurst, John W. Howson, Steven Fishwick
  • Publication number: 20180197269
    Abstract: A graphics processing unit is configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles. The graphics processing unit comprises one or more processing cores configured to process graphics data. The graphics processing unit also comprises scheduling logic configured to subdivide at least one set of one or more tiles of the rendering space to form a plurality of subunits (e.g. subtiles) and to assign at least some of those subunits to different processing cores for rendering. The subdivision of tiles can be particularly useful for expensive tiles occurring near the end of a render to reduce the impact on the total render time when expensive tiles are scheduled near the end of a render.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 12, 2018
    Inventors: Richard Broadhurst, Steven Fishwick
  • Publication number: 20170316604
    Abstract: A method of processing primitives within a tiling unit of a graphics processing system is described. The method comprises determining whether a primitive falls within a tile based on positions of samples within each pixel. If it is determined that the primitive does fall within a tile based on the positions of samples within pixels in a tile, an association between the tile and the primitive is stored to indicate that the primitive is present in the tile. For example, an identifier for the primitive may be added to a control stream for the tile to indicate that the primitive is present in the tile. Various different methods are described to make the determination and these may be used separately or in any combination.
    Type: Application
    Filed: April 27, 2017
    Publication date: November 2, 2017
    Inventors: Xile Yang, Lorenzo Belli, Richard Broadhurst
  • Publication number: 20160098856
    Abstract: A graphics processing system includes a tiling unit for performing tiling calculations and a hidden surface removal (HSR) unit for performing HSR on fragments of the primitives. Primitive depth information is calculated in the tiling unit and forwarded for use by the HSR unit in performing HSR on the fragments. This takes advantage of the tiling unit having access to the primitive data before the HSR unit performs the HSR on the primitive fragments, to determine some depth information which can simplify the HSR performed by the HSR unit. Therefore, the final values of a depth buffer determined in the tiling unit can be used in the HSR unit to determine that a particular fragment will be subsequently hidden by a fragment of a primitive which is yet to be processed in the HSR unit, such that the particular fragment can be culled.
    Type: Application
    Filed: October 6, 2015
    Publication date: April 7, 2016
    Inventors: Richard Broadhurst, John Howson, Robert Theed