Abstract: A thermal interface material for use in manufacturing a semiconductor component and a method for manufacturing the semiconductor component. The thermal interface material includes a metallic element in combination with either antimony or tin. Suitable metallic elements include gallium or indium. The concentration of antimony or tin is about 2 percent or less by weight of the thermal interface material. A semiconductor chip is mounted to a support substrate and the thermal interface material is disposed on the semiconductor chip. A lid or a heatsink is coupled to the semiconductor chip via the thermal interface material.

Abstract: One embodiment of the invention relates to a method for refreshing a nonvolatile memory array. In the method, a threshold voltage of a multi-bit memory cell is analyzed to determine if it has drifted outside of a number of allowable voltage windows, wherein each allowable voltage windows corresponds to a different multi-bit value. If the threshold voltage of the cell has drifted outside of the number of allowable voltage states, then the cell is recovered by adjusting at least one voltage boundary of at least one of the number of allowable voltage states.

Abstract: A plurality of channels are formed in a base, e.g., a substrate of an integrated circuit, each channel extending between edges of the base. Two pairs of manifolds are provided, the first pair communicating with a first group of channels and the second pair communicating with a second group of channels, the first group of channels and the first pair of plena isolated from the second group of channels and the second pair of plena. Each of the pairs of manifolds includes multiple branches coupled to the channels and a common plenum. Cooling fluid is injected into the channels from different sides of the base, causing fluid to flow in different directions in the two groups of channels, the channels in thermal contact with the integrated circuit.

Abstract: A plurality of channels are formed in a base, e.g., a substrate of an integrated circuit, each channel extending between edges of the base. Two pairs of manifolds are provided, the first pair communicating with a first group of channels and the second pair communicating with a second group of channels, the first group of channels and the first pair of plena isolated from the second group of channels and the second pair of plena. Each of the pairs of manifolds includes multiple branches coupled to the channels and a common plenum. Cooling fluid is injected into the channels from different sides of the base, causing fluid to flow in different directions in the two groups of channels, the channels in thermal contact with the integrated circuit.

Abstract: An integrated circuit package includes a substrate having a central axis dividing the substrate into an upper half and a lower half and an integrated circuit coupled to the substrate. A layer is provided within the substrate in the lower half thereof that is configured to resist warpage of the integrated circuit package, the layer provided a distance from the central axis.

Abstract: A lidded semiconductor device has a first layer applied to the lid, which first layer is chosen of a material which fluoresces upon application of non-visible electromagnetic waves thereto, for example, ultraviolet light. A second layer is provided over the first layer. Openings extend through the second layer and further extend to a substantial depth into the first layer, for example, generally halfway into the first layer, to expose portions of the first layer.

Abstract: In a high power input/output SOI semiconductor structure, the transistors thereof are laid out in a manner so that the high current density transistors, subject to the greatest heat buildup, are spaced apart in a manner as to avoid significant heat buildup.

Abstract: The present neutron sensing device includes a first substantially planar array of flash memory cells, a second substantially planar array of flash memory cells having an edge adjacent an edge of the first substantially planar array of flash memory cells, and a third substantially planar array of flash memory cells having a first edge adjacent an edge adjacent an edge of the first substantially planar array of flash memory cells and a second edge adjacent an edge of the second substantially planar array of flash memory cells.

Abstract: A semiconductor structure includes a substrate and a semiconductor devices secured to the substrate. A stabilizing member is secured to the semiconductor device, and has a coefficient of thermal expansion which is substantially the same as the coefficient of thermal expansion of the substrate. The bending stiffness of the substrate is substantially the same as the bending stiffness of the stabilizing member, wherein: bending stiffness=Et3, with E=Young's modulus, and t=thickness. In another embodiment, a stabilizing member is secured to the substrate, and has a coefficient of thermal expansion which is substantially the same as the coefficient of thermal expansion of the die. The bending stiffness of the die is substantially the same as the bending stiffness of the stabilizing member, with bending stiffness defined as above.

Abstract: A system and method for removing a conductive line from a semiconductor device is disclosed. The conductive line includes a conductive layer and a barrier layer separating the conductive layer from a portion of the semiconductor device. The method and system include exposing a portion of the barrier layer, etching the barrier layer after the barrier layer has been exposed, and lifting off the conductive layer after the barrier layer has been etched.

Abstract: An apparatus for x-raying a semiconductor device which includes semiconductor material and conductive material, the apparatus including a source of x-rays, a filter for receiving x-rays from the source of x-rays and allowing transmission of x-rays to the device, the filter having an atomic number greater than the atomic number of the conductive material of the device, and an x-ray imager for receiving x-rays from the device.

Abstract: A semiconductor apparatus includes a semiconductor body in the form of a silicon substrate havng a plurality of active devices. A metal stack including a plurality of metal layers is operatively associated with the active devices. A plurality of conductive elements are connected to the metal stack and to a substrate in the form of for example a printed circuit board. Vias connect conductive elements with respective portions of at least some of the metal layers, with the conductive elements connected to heat absorbing members within the substrate, which is in turn connected to a heat sink external to the substrate, the vias being spaced at regular intervals so as to promote heat dissipation from the metal stack therethrough to the heat absoring members and the heat sink.

Abstract: The present invention is a method for providing chip scale package. The method of the present invention includes providing a die with a first side, a second side, and a plurality of edges; applying a substance which protects against electrostatic discharge to the first side of the die and to the plurality of edges; and providing components on the second side of the die. The method of the present invention protects the chip scale package from electrostatic discharges. Markings may also be placed on the substance without damaging the chip in the package.

Abstract: In the testing of one or more die as part of a semiconductor wafer, electrical testing of an unstressed die of a wafer is undertaken. The die of the wafer is then physically stressed to a first stressed state, and electrical testing is undertaken thereon. The die of the wafer is then physically stressed to a second stressed state, and electrical testing is again undertaken on the die as it is in its second stressed state. The results of the tests are compared and extrapolated to indicate electrical performance of the die in other physically stressed states. A relatively simple tool is provided for use in performing in this method in an effective and rapid manner.

Abstract: A magnetic field imaging apparatus for sensing a magnetic field generated by current flowing in the semiconductor device includes a pair of sensing devices which may be focused at a chosen depth in a semiconductor device. The sensing devices may be movable so that they may be focused at different focal points. The apparatus may also include three or more sensing devices, which can be chosen to operate in tears to define a variety of focus depths in a semiconductor device.

Abstract: Method for determining the robustness of a device to soft errors generated by alpha-particle and/or cosmic ray strikes.

Abstract: The present invention is a method for providing chip scale package. The method of the present invention includes providing a die with a first side, a second side, and a plurality of edges; applying a substance which protects against electrostatic discharge to the first side of the die and to the plurality of edges; and providing components on the second side of the die. The method of the present invention protects the chip scale package from electrostatic discharges. Markings may also be placed on the substance without damaging the chip in the package.

Abstract: A system and method for identifying a location of a short in a circuit of a semiconductor device is disclosed. The method and system includes providing a power supply and providing a power distribution network coupled to the power supply. The power distribution network is for distributing power to a portion of the circuit. The power distribution network further including means for selectively disconnecting a portion of the power distribution network. The portion of the power distribution network supplies power to the location of the short.

Abstract: Method for implementing a multi-phase plastic package for electronic components, and packaged electronic components produced according to the method. The present invention contemplates the use of molding compounds having two or more discrete phases in a transfer molding process wherein a temperature differential is induced between the electronic component to be packaged and the mold of the molding apparatus prior to molding. Each of the molding compound phases, when used in a current transfer molding apparatus, generates a separate layer in the resultant package, and each of the resultant layers possesses certain unique properties. In its simplest implementation, the present invention provides a two-phase molding compound pellet which provides an outer layer containing mold release compounds to facilitate release of the completed packaged device from the mold, and an inner layer without mold release agents. Other implementations include multiple layers.

Abstract: A system and method for detecting a position of a short in a semiconductor device is disclosed. The semiconductor device includes a semiconductor die and a substrate. The method and system include supplying alternating power to the semiconductor device. The method and system further include sensing a plurality of synchronous temperature variations in proximity to a surface of the semiconductor die while power is supplied to the semiconductor die.