Patents by Inventor Richard Dellacona

Richard Dellacona has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9425644
    Abstract: An apparatus for charging an electrically chargeable device is provided. The apparatus comprises a core structure. The core structure comprises a first portion common to each of a first magnetic flux circuit in the core structure and a second magnetic flux circuit in the core structure. The core structure comprises a second portion included in the first magnetic flux circuit and not included in the second magnetic flux circuit. The apparatus comprises a first coil wound on or around the first portion and configured to be driven by an alternating voltage. The apparatus comprises a second coil wound on or around the second portion and configured to be electrically coupled to the electrically chargeable device.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: August 23, 2016
    Assignee: THOR CHARGER COMPANY
    Inventors: Richard Dellacona, Robert Daniel Arnon
  • Publication number: 20130111551
    Abstract: A computer readable storage medium has instructions that, when executed by a host computer cause the host computer to perform a method of write protecting the storage medium and therefore preventing a non-registered user from changing the permissions log file. The instructions include: writing copies of control files of the host computer into the protected memory, writing a copy of a user permissions log file of the host computer into the protected memory, and changing a startup execute path function of the host computer to initially read the copy of the user permissions log file in the protected memory; and opening a write controlling circuit path to prevent access to changing the permissions log file.
    Type: Application
    Filed: April 20, 2012
    Publication date: May 2, 2013
    Inventors: Richard Dellacona, Robert Arnon
  • Patent number: 8178998
    Abstract: A system and method for delivering electrical power-on-demand to at least one load circuit wherein the system operates primarily with reactive power. The method includes inductively coupling power from a source in a primary circuit to one or more load circuits. The system is arranged to store magnetic energy in a core surrounded by planar coils positioned in parallel. The magnetic circuit is toroidal, symmetrical and circuitous. Magnetic energy is transferred between loads through the system. Back currents from the loads are able to be converted to magnetic field energy contributing to the total of stored energy available to the loads. Since the combined energy held in the system is primarily reactive, internal energy losses are small.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 15, 2012
    Assignee: Verde Power Supply
    Inventors: Richard Dellacona, Michael James Connor, Gilbert Amelio
  • Publication number: 20110080055
    Abstract: A system and method for delivering electrical power-on-demand to at least one load circuit wherein the system operates primarily with reactive power. The method includes inductively coupling power from a source in a primary circuit to one or more load circuits. The system is arranged to store magnetic energy in a core surrounded by planar coils positioned in parallel. The magnetic circuit is toroidal, symmetrical and circuitous. Magnetic energy is transferred between loads through the system. Back currents from the loads are able to be converted to magnetic field energy contributing to the total of stored energy available to the loads. Since the combined energy held in the system is primarily reactive, internal energy losses are small.
    Type: Application
    Filed: November 17, 2010
    Publication date: April 7, 2011
    Inventors: Richard Dellacona, Michael James Connor, Gilbert Amelio
  • Publication number: 20100327824
    Abstract: A flux sharing magnetic circuit has a parallel arrangement of secondary flux loops with secondary windings to drive output loads. A shared pool of flux is provided by a primary winding. An AC driven primary delivers current to the secondary circuits to maintain a desired voltage or current to a load. One or more control windings control current in the parallel flux loops and thus control the power delivered to the loads.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventor: Richard Dellacona
  • Patent number: 7847664
    Abstract: A flux sharing magnetic circuit has a parallel arrangement of secondary electromagnetic circuits with independent loads. An AC driven primary delivers current to the secondary circuits to maintain charge in their batteries. The batteries deliver DC current to the loads while secondary coils provide battery charging currents to maintain charge in the batteries. When current is not drawn by the battery or the load, flux is delivered to a flux pool in the magnetic circuit so that input AC power drain is reduced.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: December 7, 2010
    Assignee: Verde Power Supply, Inc.
    Inventor: Richard Dellacona
  • Publication number: 20100283571
    Abstract: A flux sharing magnetic circuit has a parallel arrangement of secondary electromagnetic circuits with independent loads. An AC driven primary delivers current to the secondary circuits to maintain charge in their batteries. The batteries deliver DC current to the loads while secondary coils provide battery charging currents to maintain charge in the batteries. When current is not drawn by the battery or the load, flux is delivered to a flux pool in the magnetic circuit so that input AC power drain is reduced.
    Type: Application
    Filed: May 6, 2009
    Publication date: November 11, 2010
    Inventor: Richard Dellacona
  • Patent number: 7804275
    Abstract: A battery power supply for use with an electronic device, such as a computer, uses a multi-cell battery, and a recharging circuit. Cells of the battery are serially interconnected to produce positive output voltages of 3.6, 4.8 and 12 volts DC and negative voltages of 4.8 and 12 volts DC. The power supply includes output terminals for delivering the DC voltages to power inlets of the device nominally rated at 12, 5 and 3.3 volts DC. The recharging circuit includes an AC voltage input terminal and outputs corresponding to the battery output terminals.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: September 28, 2010
    Inventor: Richard Dellacona
  • Publication number: 20090033281
    Abstract: A battery power supply for use with an electronic device, such as a computer, uses a multi-cell battery, and a recharging circuit. Cells of the battery are serially interconnected to produce positive output voltages of 3.6, 4.8 and 12 volts DC and negative voltages of 4.8 and 12 volts DC. The power supply includes output terminals for delivering the DC voltages to power inlets of the device nominally rated at 12, 5 and 3.3 volts DC. The recharging circuit includes an AC voltage input terminal and outputs corresponding to the battery output terminals.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 5, 2009
    Inventor: Richard Dellacona
  • Publication number: 20080186993
    Abstract: A method of data interchange within one or a network of microcomputers, wherein the microcomputers each have plural devices engaged for communication over a bus structure, the method including the steps of installing a TCP/IP protocol instruction set in each of the devices and in an operating system of each of the microcomputers in the network, and directing data transfers between the devices of all of the microcomputers over the bus structures of all of the microcomputers using packet switching protocol, thereby enabling said data transfers to be made within each of the microcomputers and between the microcomputers.
    Type: Application
    Filed: February 3, 2007
    Publication date: August 7, 2008
    Inventor: Richard Dellacona
  • Publication number: 20070266074
    Abstract: A high speed, microcomputer based, Fibre Channel compatible and fault tolerant information processing and mass storage system especially suited for information servers and application servers. A unique and extremely versatile system architecture, including a dual loop arbitrated, Fibre Channel capable, multiple-fault tolerant, hot swappable mass storage disk array, permits combinations of servers and mass storage arrays which can be tailored for a wide variety of applications and which can be configured with emphasis on the system characteristics such as redundancy, speed, processing capability, storage capability, and the like, as desired. A unique backplane and/or midplane arrangement for connecting the system components allows for easy and, in most cases, on-line field upgrading and/or service and at the same time provides for the very effective cooling of components, particularly those such as disk drives which tend to produce a lot of heat.
    Type: Application
    Filed: July 19, 2007
    Publication date: November 15, 2007
    Applicant: QUAD RESEARCH
    Inventor: Richard Dellacona
  • Patent number: 7263476
    Abstract: A high speed, microcomputer based, Fibre Channel compatible and fault tolerant information processing and mass storage system especially suited for information servers and application servers. A unique and extremely versatile system architecture, including a dual loop arbitrated, Fibre Channel capable, multiple-fault tolerant, hot-swappable mass storage disk array, permits combinations of servers and mass storage arrays which can be tailored for a wide variety of applications and which can be configured with emphasis on the system characteristics such as redundancy, speed, processing capability, storage capability, and the like, as desired. A unique backplane and/or midplane arrangement for connecting the system components allows for easy and, in most cases, on-line field upgrading and/or service and at the same time provides for the very effective cooling of components, particularly those such as disk drives which tend to produce a lot of heat.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: August 28, 2007
    Assignee: Quad Research
    Inventor: Richard Dellacona
  • Publication number: 20070198995
    Abstract: The present invention discloses system and method for delivery of software from a device to a host system, with the software enabling the host system to communicate with the device. The method of the present invention uses an electronic component/storage device associated with the device (or provides one if none exists), and configures the electronic component to comprise a file system and files that are native to operating system of the host, which the host system can recognize, access, and use automatically for initiating communications with the device.
    Type: Application
    Filed: March 16, 2006
    Publication date: August 23, 2007
    Inventor: Richard Dellacona
  • Publication number: 20070177426
    Abstract: The present invention discloses a system and method for delivery of software payload from a peripheral device to a host system, with generally one component of the software payload enabling the host system to communicate with the peripheral device. The method of the present invention uses an electronic component/storage device associated with the peripheral device (or provides one if none exists), and configures the electronic component to comprise a file system (e.g., CDFS—Compact Disk File System) and files that are native to operating system of the host (e.g., AUTORUN.INF), which the host system can recognize, access, and use automatically for initiating communications with the peripheral device, and delivery of the software payload. When communication with the host is established, any program can be loaded from the peripheral device to the host because the peripheral device appears to the host system as a CD ROM with an AUTORUN. INF file.
    Type: Application
    Filed: July 20, 2006
    Publication date: August 2, 2007
    Inventor: Richard Dellacona
  • Publication number: 20070143591
    Abstract: A method for checking a computer's operating system for corruption and for de-corrupting it takes the steps of: loading a copy of an original operating system onto a second partition on the main drive, adapting the copy of the original operating system to the existing hardware configuration, restarting the computer from the copy of the original operating system, comparing the existing operating system on the first partition with the copy of the original operating system on the second partition so as to detect corrupted portions of the existing operating system, overwriting each of the corrupted portions of the existing operating system with each corresponding portion of the copy of the original operating system, restarting the computer from the existing operating system and rendering the first partition on the main drive as active before restarting the computer.
    Type: Application
    Filed: February 23, 2007
    Publication date: June 21, 2007
    Inventor: Richard Dellacona
  • Publication number: 20060080540
    Abstract: An OS module is plug compatible with a host computer preferably through its USB port. The module includes a data signal gate, a hardwire write control device, a first memory device, and a second memory device. The first memory device holds portions of an OS that are unchanged during startup and operation of the host computer, while the second memory device holds portions of the OS that may be changed during startup and operation of the host computer. These components are interconnected for data signal flow between the host computer and the second memory device through the data signal gate, while data signal flow from the computer for writing to the first memory device is functional only through the data signal gate and the write control device. The first memory device may be read without limitation.
    Type: Application
    Filed: October 8, 2004
    Publication date: April 13, 2006
    Inventors: Robert Arnon, Richard Dellacona
  • Publication number: 20060080518
    Abstract: A removable drive is plug compatible with a host computer preferably through its USB port. The drive auto-launches upon insertion and runs read, write and execute functions on a resident file in the removable drive, tagging the control programs of the host computer that are responsible for these functions. The control programs are then copied to the removable drive and the path for these functions is changed to the removable drive. When the removable drive is right protected, the host computer is no longer a viable target for unauthorized access.
    Type: Application
    Filed: April 29, 2005
    Publication date: April 13, 2006
    Inventors: Richard Dellacona, Robert Arnon
  • Publication number: 20050223146
    Abstract: A high speed, microcomputer based, Fibre Channel compatible and fault tolerant information processing and mass storage system especially suited for information servers and application servers. A unique and extremely versatile system architecture, including a dual loop arbitrated, Fibre Channel capable, multiple-fault tolerant, hot-swappable mass storage disk array, permits combinations of servers and mass storage arrays which can be tailored for a wide variety of applications and which can be configured with emphasis on the system characteristics such as redundancy, speed, processing capability, storage capability, and the like, as desired. A unique backplane and/or midplane arrangement for connecting the system components allows for easy and, in most cases, on-line field upgrading and/or service and at the same time provides for the very effective cooling of components, particularly those such as disk drives which tend to produce a lot of heat.
    Type: Application
    Filed: February 4, 2005
    Publication date: October 6, 2005
    Inventor: Richard Dellacona
  • Publication number: 20050203989
    Abstract: A high speed, microcomputer based, Fibre Channel compatible and fault tolerant information processing and mass storage system especially suited for information servers and application servers. A unique and extremely versatile system architecture, including a dual loop arbitrated, Fibre Channel capable, multiple-fault tolerant, hot swappable mass storage disk array, permits combinations of servers and mass storage arrays which can be tailored for a wide variety of applications and which can be configured with emphasis on the system characteristics such as redundancy, speed, processing capability, storage capability, and the like, as desired. A unique backplane and/or midplane arrangement for connecting the system components allows for easy and, in most cases, on-line field upgrading and/or service and at the same time provides for the very effective cooling of components, particularly those such as disk drives which tend to produce a lot of heat.
    Type: Application
    Filed: May 9, 2005
    Publication date: September 15, 2005
    Inventor: Richard Dellacona
  • Publication number: 20050193059
    Abstract: The information server system incorporates a high speed, microcomputer based server running industry standard operating system software enhanced to include functionality directed to operation of a new disk array controller, which controls the physically independent or integral disk storage device array, and communications interface. The disk array controller subsystem controls and communicates with the disk storage device array with a Fibre Channel protocol. The disk storage device array incorporates a plurality of disk storage devices with a corresponding number of bypass interface cards configured to facilitate the on-line addition, removal and replacement of disk storage devices.
    Type: Application
    Filed: April 28, 2005
    Publication date: September 1, 2005
    Inventor: Richard Dellacona