Abstract: A bilateral media storage unit for storing and carrying CD ROMs, computer diskettes, removable disk storage devices and the like. The storage unit includes a discus shaped portable housing having a generally bowl shaped lower base component and a generally bowl shaped upper cover component which are coupled together at opposite points on their peripheries by selectively releasable hinges which pivotally couple the upper cover component to the lower base component and which release the upper cover component to pivot away from the lower base component when released. An accordion pleated extendable media receptacle is mounted within the portable housing.

Abstract: Systems and methods for accurately skewing periodic signals using a matching pair of voltage controlled delay lines, a frequency comparator, and a common control signal to the delay lines as generated by the frequency comparator. A feedback oscillation is established in a loop including one of the voltage controlled delay lines. The frequency comparator controls the frequency of the loop oscillation in direct proportion to a comparison between the oscillation frequency and a subharmonic of a base clock signal. The base clock signal is sent through the second voltage controlled delay line, which by matching of delay line characteristics and a common control signal introduces a clock period of skew or delay over the length of the second voltage controlled delay line. Taps to nodes in the succession of device stages making up the second voltage controlled delay line provides the clock signals with directly proportioned skews, the skews being defined by precise physical divisions of the delay line.

Abstract: A method and apparatus are disclosed for sending and receiving logic signals. A driver is connected to a first end of a transmission line with a predetermined impedance and first and second transmission line ends for communicating the logic signals. The driver has a source for sending the logic signals, and a reference generator connected to the source for setting the magnitude of the signals sent by the source. A receiver is connected to the second transmission line end, and has a transmission line terminator for sinking the signals, and a reference generator connected to the terminator for setting a bias of the terminator to establish a certain family of terminator impedances for sinking the signals. The driver reference generator and the receiver reference generator interactively match the terminator impedance to the transmission line for the set magnitude of the signals.

Abstract: A method and apparatus are disclosed for sending and receiving logic signals responsive to external digital data input and control signals. A reference circuit providing a first and second reference signal is common to the signal generating and receiving circuitry. The signal generating circuitry includes a signal source connected to the transmission line for generating a variable level digital signal, and a reference level adjusting and switching circuit ("RLA/S circuit") which is responsive to the digital data input and the first reference signal. The RLA/S circuit is connected to the signal source for selecting the level of the variable level digital signal and providing a switching signal. The signal source output is thus adjusted and switched so that the signal source generates a digital signal to the transmission line which follows the digital data input at the selected output signal level.

Abstract: Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film.

Abstract: Discrete computational elements are provided that will be connected to a base unit, and to one another or I/O devices, in order to configure a particular computer system. The base unit provides the electrical power required to energize the computational elements. A plurality of identically configured substrates are joined in a layered relation and are electrically connected with one another. These substrates are capable of being fabricated of different lengths such that they can extend outwardly from the computational element and may be connected to other computational elements. At least one integrated circuit will be placed on one side of the joined substrates and is electrically connected to each substrate layer. In this manner the ICs will be able to communicate with chips on other computational elements.

Abstract: A method and system for manufacturing electrically isolated vias in a flexible substrate composed of a metal core laminated by layers of an organic material. The method includes the steps of etching via holes, hydrolyzing the inner organic surfaces of the via holes and baking a polyimide solution coated in the via holes.

Abstract: A memory module is built up from a power distribution assembly in the form of plates forming a capacitor of low inductance and a flexible circuit substrate. The circuit substrate is populated with precisely positioned contact pads for the power, read, write and address lines of memory chips that contact the substrate. Memory chips are fixed to heat spreaders and loaded into a chip holder which positions the chips for contact with the contact pads on the substrate. The substrate contact pads are plated to form dendritic crystals of palladium and the memory chips are provided with solder balls on the contact pads of the memory chip. The solder balls are held in contact with the contact pads by the compressive forces of clamping a heat sink over the heat spreaders for testing, and the assembly may be readily disassembled to replace any defective memory. The compression connection of the chips to the substrate may be relied on or the solder balls may be reflowed to establish permanent solder connections.

Abstract: A method and apparatus is provided for testing integrated circuits and permanently affixing the ICs which are successfully tested to a product level carrier substrate. A modular test oven is used which allows the chips to be electrically and thermally tested with the chips non-permanently affixed to a carrier substrate. If all of the chips on the carrier substrate test good, then the temperature within the oven is elevated, thereby reflowing the solder balls and permanently affixing the chips to the carrier substrate.

Abstract: A method of fabricating a substrate module is provided that includes cavities of a diameter and depth which take into account the statistical variance in the dimensions of C4 solder balls. By constructing cavities with the proper dimensions, electrical connection between the chip and substrate, via the solder balls, can be ensured. Further, an annular shoulder is provided which acts as a positive stop to prevent any over travel of the C4s within the cavity, thereby allowing a great deal more pressure to be applied to seat the chip than possible with conventional methods. The present invention also provides processes for applying a coating of material onto the substrate which acts as an adhesive and sealant. This material is provided intermediate any of the holes or cavities (vias) which may be contained within the substrate, and is not deposited in these vias such that no interference is encountered when attaching the chip by way of the C4 solder balls thereon.

Abstract: A chip overlay element is formed of a flexible substrate of polymer having electrically conductive material applied to one side thereof and circuitized to form signal lines. A metal stiffener/heat spreader is laminated to the polymer on the opposite side of the conductor. I/Os are formed on one end of the signal lines of the circuitized layer (near the end of the overlay element) and interconnection pads, bumps, or the like are formed on the opposite end (near the center of the element). The metal stiffener is then etched to form three distinct areas. The chip edge is then placed on the center metal stiffener area and bonded, with the other two stiffener areas being bent around the chip and bonded to the corresponding chip sides. The original I/Os are then electrically connected to the I/Os formed on the signal lines of the overlay element.

Abstract: A fluid actuated connector is provided with opposing circuit members that form the interior of the connector and which are substantially L-shaped with a substantially vertical portion facing a circuit card to be inserted into the connector and a substantially horizontal portion disposed onto a printed circuit board (PCB), such as a motherboard, or the like. The circuit members are disposed adjacent a frame and connector body such that a cavity is formed adjacent the circuit members and on a side opposite the electrical connection points being being contacted with the printed circuit card. The circuit membranes are formed of a single layer of dielectric material, to maintain the required resiliency, and have contacts, which may be in the form of "bumps" etched into an electrically conductive material applied to the surface of the dielectric facing the circuit card.

Abstract: A power management circuit for operating a magnetic repulsion punch comprising a storage capacitor arranged to be connected in parallel with an inductive load serving as an operating coil of the magnetic repulsion punch, a means for selectively and temporarily coupling the inductive load to the storage capacitor for forming a resonant circuit, and a means for charging the storage capacitor after each operation.

Abstract: A connector for connecting large numbers of contact points on a flat ribbon cable to corresponding contact points on a second flat ribbon ribbon cable is described. The connector is a rigid clamping device which encompasses the cables where they join and through the use of springs and force spreaders the connections at the cable interface are completed. The connections of the cables are disposed within a chamber within the connector and rigidly clamped to prevent movement or separation of the connections.

Abstract: This invention provides a heat sink assembly for cooling electrical and electronic circuits. A low cost assembly method is achieved by a pivotal assembly containing a heat sink which snaps into place adjacent to an electrical/electronic circuit which requires cooling. The snap-in heat sink assembly contains a resilient heat transfer material which is exposed to the devices requiring heat removal by windows or other openings in a plate which is disposed between the heat transfer material and the snap-in frame.

Abstract: Substrate layers with individual bumps and cavities are provided which can be manufactured and tested in parallel and then joined into a multilayer substrate. The method of manufacturing these layers, as contemplated by the present invention, includes initially forming a plurality of vias in a layer of electrically conductive material. Next, a dielectric material, is placed adjacent the layer of conductive material. Holes which are coaxial with the vias are then formed in the dielectric material. Electrically conductive material is then deposited within the vias, thereby forming a conductive stud. Additional electrically conductive material is then deposited, on the side of the dielectric opposite the conductive material to form a signal layer, as well projections of electrically conductive material extending from the studs. A continuous layer of dielectric material is then placed adjacent the side of the substrate opposite the projections.

Abstract: A method and apparatus is provided for testing integrated circuits and permanently affixing the ICs which are successfully tested to a product level carrier substrate. A modular test oven is used which allows the chips to be electrically and thermally tested with the chips non-permanently affixed to a carrier substrate. If all of the chips on the carrier substrate test good, then the temperature within the oven is elevated, thereby reflowing the solder balls and permanently affixing the chips to the carrier substrate. This card can then be used in the manufacture of an electronic device without the necessity of reworking the burned-in ICs. Further, if any of the chips fail the burn-in testing, the time and overhead required for reworking is minimized since the chips are not permanently attached.

Abstract: A multi-level circuit structure is provided which includes a plurality of overlying substrates, each having at least one conductive core. A plurality of imprinted depressions are formed in each substrate, each depression having a convex surface and a concave surface. Dielectric coatings are utilized to provide insulation between adjacent substrates and by selectively placing a conductive mass between selected overlying imprinted depressions an electrical connection may be formed between adjacent imprinted depressions wherein selected portions of one substrate may be electrically coupled to selected portions of a second substrate.

Abstract: A multilayer, flexible substrate upon which integrated circuit chips can be attached is disclosed. The input/output(I/O) connections from the chip do not radiate outward from the side of the die, but rather extend from a bottom surface. Since the I/O signal lines would not be accessible for testing once the IC chip is mounted on a substrate, each I/O line is extended outward from the IC footprint to an area on the substrate which is accessible. Additionally, an electrical path from each I/O signal port is simultaneously passed through the substrate layers upon which the chip is mounted, thus providing electrical contact of all I/O ports to the underside of the flexible substrate.An integrated circuit chip is mounted on this flexible substrate. Since each I/O line is accessible after mounting, the IC chip can be tested prior to mounting on its ultimate carrier. Once tested, the IC chip and the substrate upon which it is mounted are excised from the roll of substrate material.

Abstract: An electronic circuit packaging module includes a lower substrate, an upper cooling unit, and a frame disposed between the substrate and cooling unit. The substrate carries a plurality of integrated circuit chips with lead-outs to a plurality of downwardly protruding dimpled contact points disposed about the substrate periphery. The frame includes a plurality of insulative inserts about its periphery having conductive pins each with a lower extension extending below the insert and an upper contact point recessed within the insert. The cooling unit includes a plurality of fluid bags each in contact with a respective chip on the substrate for thermal management. A plurality of such modules are stacked in vertical registry with each downwardly protruding dimple of a module extending into a respective insert recess of an adjacent module.