Abstract: An interconnect strip is provided for effecting electrical interconnection between pluralities of conductor pads disposed on circuit boards or the like in a high density configuration. The strip is fabricated from a polymer film carrier having laminated thereon a metal foil with preselected spring properties. After lamination, lithographic techniques from a series of electrically isolated metallic beams on the carrier. Additional chemical processing removes portions of the carrier at opposing sides of the strip to expose opposing ends of the beams which extend beyond the carrier parallel to one another in opposing directions outwards from the carrier. By urging the pads towards respective beam ends of the strip disposed between the pads until mating engagement therewith, a plurality of electrical interconnections are established through the beams.

Abstract: A heat sink for utilization in thermal management of high density integrated circuit substrates is disclosed. Each heat sink includes at least one compliant bag containing a mass of thermally conductive fluid. Within each compliant bag is an aperture which contains a thin pliable metallic membrane having a high Z axis thermal conductivity. The metallic membrane is adapted to slidably mate with a surface of an integrated circuit device to permit relative motion during thermal mismatch while enhancing thermal conductivity from the integrated circuit device into the thermally conductive fluid. A second metallic membrane is preferably mounted to the upper surface of the compliant bag and is thermally coupled to a plurality of cooling fins. In one embodiment of the present invention, a plurality of such compliant bags are serially interconnected and a pump is utilized to circulate fluid through each compliant bag.

Abstract: A method and apparatus are disclosed for testing integrated circuit devices. A ferromagnetic test substrate is manufactured, utilizing a process substantially similar to the process utilized to create the integrated circuit devices to be tested, such that the test substrate and the integrated circuit devices are thermally matched. The test substrate preferably includes a plurality of electrical contact points which correspond to a plurality of electrical contact points within the integrated circuit device. By aligning the ferromagnetic test substrate and integrated circuit device to be tested in a position proximate to an electromagnet and selectively energizing the electromagnet, the electrical contact points within the ferromagnetic test substrate are magnetically urged into contact with the electrical contact points within the integrated circuit device.

Abstract: A system for providing low insertion force electrical interconnections between high density contacts for use in interconnecting circuit packages. A housing has disposed therein one or more pre-buckled beam connectors. Each connector has a resilient insulative strip carrying a plurality of buckling beams electrically isolated from each other. The beams are aligned on the plane defining the strip in parallel with ends extending away from the strip edges in opposing directions. Means are provided for deforming the strip within the housing prior to effecting desired interconnections whereby the beams are pre-buckled. Upon urging contacts into proximity with the beam ends, the buckling force is released causing each beam's ends to be urged away from the strip into engagement with respective contacts, thereby effecting desired interconnection between contacts and through one or more beams.

Abstract: Improved tape automated bonding (TAB) packaging technology is disclosed having particular utility with semiconductor integrated circuit chips having high gate count and I/O requirements, utilizing a polymer layer of the package to support decoupling capacitor(s) mounted across power and ground leads connecting the chip and internal planes of a printed circuit board to which the TAB package is attached.

Abstract: An integrated power circuit for driving an inductor load including an integrated current sensor is provided. The integrated circuit includes a power transistor in series with the inductive load for operationally conducting a load current of at least 1 amperes and circuitry for applying a predetermined operational voltage across the power transistor. A sensing transistor having an emitter-base junction area less than 10.sup.-3 times the emitter-base junction area of the power transistor and a base terminal common with the base terminal of the power transistor is included in the integrated circuit as is circuitry for applying a predetermined voltage across the sensing transistor. The integrated circuit further includes circuitry for applying a voltage to the common base terminals to activate both the power and sensing transistors whereby a small current mirroring the load current flows through the sensing transistor. The circuitry also senses the current level of the activated sensing transistor.

Abstract: A damping control system for a three phase stepper motor. A reluctance velocity transducer is used for each of the three phases. The output of each of the transducers is proportional to the rotational velocity of the motor. Each of the transducers is rotationally phase shifted 3.75 with respect to one another and phased to the motor rotor rotationally such that the zero voltage crossings of the transducers correspond to the zero torque crossings of the motor. During damping or detenting of the motor the selected phase has current applied to it which is equal to a predetermined fixed value plus the feedback from its associated transducer. The windings on each side of the detent position have current applied to them which is proportional to the voltage from their respective feedback transducers. The voltage in each of the windings is amplified by a selected gain constant.