Abstract: An interface system capable of providing pre-emptive arbitration among multiple agents comprises an interface including at least a first agent and a second agent which share the interface for transferring data, the second agent having priority over the first agent for access to the interface. A pre-emptive arbiter provides arbitration between the first agent and the second agent when at least one of a first transfer request signal is asserted by the first agent for requesting access to the interface by the first agent and a second transfer request signal is asserted by the second agent for requesting access to the interface by the second agent. The pre-emptive arbiter is capable of synthesizing a transfer completion signal on the interface for preempting access of the first agent to the interface so that access may be granted to the second agent.

Abstract: The present invention is directed to an interface. In an aspect of the present invention, an interface system suitable for coupling a bus interface controller with a back-end device includes a bus interface controller and a back-end device in which the back-end device is coupled to the bus interface controller via an interface. The interface includes a command queuing interface suitable for enqueueing a transaction, a command completion interface suitable for reporting transaction completion and a data transfer interface suitable for transferring data. The data transfer interface includes an inbound data transfer interface suitable for transferring data and an outbound data transfer interface suitable for transferring data. The inbound data transfer interface and the outbound data transfer interface are suitable for processing commands simultaneously.

Abstract: The present invention is directed to a system and method for tuning retry performance of read requests of data from electronic data storage devices. In an aspect of the present invention, a method for performing a delayed read in an electronic data storage system having an initiator and a target device may include initiating a delayed read by the initiator to the target device and issuing at least one delayed read. The initiator then delays for a programmed interval before reissuing the at least one delayed read.

Abstract: Methods for designing an integrated circuit is disclosed. In the present invention, the integrated circuit is first created by placing and routing standard cells of the integrated circuit. After routing the standard cells, empty spaces unused by the standard cells are extracted. After extracting the unused areas, clusters of metal-programmable transistors are inserted into the unused areas by an area-based placement/routing tool to form “ponds” of gates (POGs). When design changes are desired after the formation of the integrated circuit, the metal-programmable transistors are programmed to form desired spare cells to implement the desired design changes by making changes to the upper layer masks for the integrated circuit.

Abstract: The present invention provides an improved method and apparatus for concurrent execution of operating systems. A software abstraction layer provides an interface that allows a first operating system to run concurrently with a second operating system on the same data processing system, in which the first operating system is in communication with the base machine in the data processing system. Interaction between the second operating system and the base machine is handled by the software abstraction layer translating requests and calls from a format normally made by the second operating system to the base machine into a format that is processed by the first operating system. Request and data intended for the second operating system are received by the first operating system, sent to the software abstraction layer and translated by the software abstraction layer into a format usable by the first operating system.

Abstract: A bridge translates addresses between a first bus and a second bus, with a larger address space capability. The bridge stores “high address” information and combines that information with address information from a device on the first bus when the device desires to transfer information from the first bus to the second bus. The bridge accesses high address information using information identifying the device.

Abstract: A method and apparatus for controlling access to a bus. A target having a period of unavailability is identified. A master device requesting access to the bus to initiate a data transfer between the master device and the target device also is identified. The master device is denied access to the bus for a delay period in response to the master device attempting to retry a data transfer with the target device, wherein the delay period is a time period after which the target device becomes available for additional transfers, wherein the bus is available to other master devices during the delay period.

Abstract: A bridge translates addresses between a first bus and a second bus, with a larger address space capability. The bridge stores "high address" information and combines that information with address information from a device on the first bus when the device desires to transfer information from the first bus to the second bus. The bridge accesses high address information using information identifying the device.

Abstract: There is disclosed an air lock filter system for separating solids from gases at temperatures up to about 1200.degree. F. wherein the filter element is a rigid porous refractory tube in an air vent for a pressure vessel. The filter element is located so that gas under pressure introduced into the vessel backwashes the filter element.