Patents by Inventor Richard Volant
Richard Volant has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7485964Abstract: A dielectric material formed by contacting a low dielectric constant polymer with liquid or supercritical carbon dioxide, under thermodynamic conditions which maintain the carbon dioxide in the liquid or supercritical state, wherein a porous product is formed. Thereupon, thermodynamic conditions are changed to ambient wherein carbon dioxide escapes from the pores and is replaced with air.Type: GrantFiled: April 6, 2006Date of Patent: February 3, 2009Assignee: International Business Machines CorporationInventors: John M. Cotte, Kenneth John McCullough, Wayne Martin Moreau, Kevin Petrarca, John P. Simons, Charles J. Taft, Richard Volant
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Publication number: 20070181974Abstract: Resistors that avoid the problems of miniaturization of semiconductor devices and a related method are disclosed. In one embodiment, a resistor includes a planar resistor material that extends vertically within at least one metal layer of a semiconductor device. In another embodiment, a resistor includes a resistor material layer extending between a first bond pad and a second bond pad of a semiconductor device. The two embodiments can be used alone or together. A related method for generating the resistors is also disclosed.Type: ApplicationFiled: February 6, 2006Publication date: August 9, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Douglas Coolbaugh, Timothy Dalton, Daniel Edelstein, Ebenezer Eshun, Jeffrey Gambino, Kevin Petrarca, Anthony Stamper, Richard Volant
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Publication number: 20070152332Abstract: The present invention relates to integrated circuits that comprise via-level wirings and/or devices. Specifically, an integrate circuit of the present invention comprises a first line level and a second line level spaced apart from each other, with a via level therebetween. The first and second line levels both comprise metal wirings and/or electronic devices. The via level comprises at least one metal via that extends therethrough to electrically connect the first line level with the second line level. Further, the via level comprises at least one via-level metal wiring and/or electronic device.Type: ApplicationFiled: January 4, 2006Publication date: July 5, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Anil Chinthakindi, Douglas Coolbaugh, Ebenezer Eshun, Vincent McGahay, Anthony Stamper, Kunal Vaed, Richard Volant
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Publication number: 20070090902Abstract: The present invention provides multiple test structures for performing reliability and qualification tests on MEMS switch devices. A Test structure for contact and gap characteristic measurements is employed having a serpentine layout simulates rows of upper and lower actuation electrodes. A cascaded switch chain test is used to monitor process defects with large sample sizes. A ring oscillator is used to measure switch speed and switch lifetime. A resistor ladder test structure is configured having each resistor in series with a switch to be tested, and having each switch-resistor pair electrically connected in parallel. Serial/parallel test structures are proposed with MEMS switches working in tandem with switches of established technology. A shift register is used to monitor the open and close state of the MEMS switches. Pull-in voltage, drop-out voltage, activation leakage current, and switch lifetime measurements are performed using the shift register.Type: ApplicationFiled: October 20, 2005Publication date: April 26, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hariklia Deligianni, Robert Edwards, Thomas Fleischman, Robert Groves, Charles Montrose, Richard Volant, Ping-Chuan Wang
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Publication number: 20070059951Abstract: A three-dimensional package consisting of a plurality of folded integrated circuit chips (100, 110, 120) is described wherein at least one chip provides interconnect pathways for electrical connection to additional chips of the stack, and at least one chip (130) is provided with additional interconnect wiring to a substrate (500), package or printed circuit board. Further described, is a method of providing a flexible arrangement of interconnected chips that are folded over into a three-dimensional arrangements to consume less aerial space when mounted on a substrate, second-level package or printed circuit board.Type: ApplicationFiled: September 30, 2003Publication date: March 15, 2007Inventors: Richard Volant, Kevin Petrarca, George Walker
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Publication number: 20060197119Abstract: A method for forming a transmission line structure for a semiconductor device includes forming an interlevel dielectric layer over a first metallization level, removing a portion of the interlevel dielectric layer and forming a sacrificial material within one or more voids created by the removal of the portion of the interlevel dielectric layer. A signal transmission line is formed in a second metallization level formed over the interlevel dielectric layer, the signal transmission line being disposed over the sacrificial material. A portion of dielectric material included within the second metallization level is removed so as to expose the sacrificial material, wherein a portion of the sacrificial material is exposed through a plurality of access holes formed through the signal transmission line. The sacrificial material is removed so as to create an air gap beneath the signal transmission line.Type: ApplicationFiled: December 5, 2005Publication date: September 7, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Anil Chinthakindi, Robert Groves, Youri Tretiakov, Kunal Vaed, Richard Volant
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Publication number: 20060180922Abstract: A dielectric material formed by contacting a low dielectric constant polymer with liquid or supercritical carbon dioxide, under thermodynamic conditions which maintain the carbon dioxide in the liquid or supercritical state, wherein a porous product is formed. Thereupon, thermodynamic conditions are changed to ambient wherein carbon dioxide escapes from the pores and is replaced with air.Type: ApplicationFiled: April 6, 2006Publication date: August 17, 2006Applicant: International Business Machines CorporationInventors: John Cotte, Kenneth McCullough, Wayne Moreau, Kevin Petrarca, John Simons, Charles Taft, Richard Volant
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Publication number: 20060164194Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.Type: ApplicationFiled: February 21, 2006Publication date: July 27, 2006Inventors: Hariklia Deligianni, Panayotis Andricacos, L. Paivikki Buchwalter, John Cotte, Christopher Jahnes, Mahadevaiyer Krishnan, John Magerlein, Kenneth Stein, Richard Volant, James Tornello, Jennifer Lund
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Publication number: 20060124927Abstract: Methods of forming a conductive structure on a substrate prior to packaging, and a test probe structure generated according to the method, are disclosed. The conductive structure includes a high aspect ratio structure formed by injected molded solder. The invention can be applied to form passive elements and interconnects on a conventional semiconductor substrate after the typical BEOL, and prior to packaging. The method may provide better electromigration characteristics, lower resistivity, and higher Q factors for conductive structures. In addition, the method is backwardly compatible and customizable.Type: ApplicationFiled: December 9, 2004Publication date: June 15, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert Groves, Peter Gruber, Kevin Petrarca, Richard Volant, George Walker
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Patent number: 7056837Abstract: A dielectric material formed by contacting a low dielectric constant polymer with liquid or supercritical carbon dioxide, under thermodynamic conditions which maintain the carbon dioxide in the liquid or supercritical state, wherein a porous product is formed. Thereupon, thermodynamic conditions are changed to ambient wherein carbon dioxide escapes from the pores and is replaced with air.Type: GrantFiled: June 6, 2003Date of Patent: June 6, 2006Assignee: International Business Machines CorporationInventors: John M. Cotte, Kenneth John McCullough, Wayne Martin Moreau, Kevin Petrarca, John P. Simons, Charles J. Taft, Richard Volant
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Publication number: 20060105534Abstract: An inductor and a method of forming and the inductor, the method including: (a) forming a dielectric layer on a top surface of a substrate; (b) forming a lower trench in the dielectric layer; (c) forming a resist layer on a top surface of the dielectric layer; (d) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and (e) completely filling the lower trench at least partially filling the upper trench with a conductor in order to form the inductor. The inductor including a top surface, a bottom surface and sidewalls, a lower portion of said inductor extending a fixed distance into a dielectric layer formed on a semiconductor substrate and an upper portion extending above said dielectric layer; and means to electrically contact said inductor.Type: ApplicationFiled: December 28, 2005Publication date: May 18, 2006Applicant: International Business Machines CorporationInventors: Daniel Edelstein, Panayotis Andricacos, John Cotte, Hariklia Deligianni, John Magerlein, Kevin Petrarca, Kenneth Stein, Richard Volant
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Publication number: 20060081981Abstract: A method of forming wire bonds in (I/C) chips comprising: providing an I/C chip having a conductive pad for a wire bond with at least one layer of dielectric material overlying the pad; forming an opening through the dielectric material exposing a portion of said pad. Forming at least a first conductive layer on the exposed surface of the pad and on the surface of the opening. Forming a seed layer on the first conductive layer; applying a photoresist over the seed layer; exposing and developing the photoresist revealing the surface of the seed layer surrounding the opening; removing the exposed seed layer; removing the photoresist material in the opening revealing the seed layer. Plating at least one second layer of conductive material on the seed layer in the opening, and removing the first conductive layer on the dielectric layer around the opening. The invention also includes the resulting structure.Type: ApplicationFiled: November 10, 2005Publication date: April 20, 2006Applicant: International Business Machines CorporationInventors: Julie Biggs, Tien-Jen Cheng, David Eichstadt, Lisa Fanti, Jonathan Griffith, Randolph Knarr, Sarah Knickerbocker, Kevin Petrarca, Roger Quon, Wolfgang Sauter, Kamalesh Srivastava, Richard Volant
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Publication number: 20060017533Abstract: A micro-electromechanical (MEM) RF switch provided with a deflectable membrane (60) activates a switch contact or plunger (40). The membrane incorporates interdigitated metal electrodes (70) which cause a stress gradient in the membrane when activated by way of a DC electric field. The stress gradient results in a predictable bending or displacement of the membrane (60), and is used to mechanically displace the switch contact (30). An RF gap area (25) located within the cavity (250) is totally segregated from the gaps (71) between the interdigitated metal electrodes (70). The membrane is electrostatically displaced in two opposing directions, thereby aiding to activate and deactivate the switch.Type: ApplicationFiled: August 26, 2002Publication date: January 26, 2006Inventors: Christopher Jahnes, Jennifer Lund, Katherine Saenger, Richard Volant
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Publication number: 20050245063Abstract: A method for forming a transmission line structure for a semiconductor device includes forming an interlevel dielectric layer over a first metallization level, removing a portion of the interlevel dielectric layer and forming a sacrificial material within one or more voids created by the removal of the portion of the interlevel dielectric layer. A signal transmission line is formed in a second metallization level formed over the interlevel dielectric layer, the signal transmission line being disposed over the sacrificial material. A portion of dielectric material included within the second metallization level is removed so as to expose the sacrificial material, wherein a portion of the sacrificial material is exposed through a plurality of access holes formed through the signal transmission line. The sacrificial material is removed so as to create an air gap beneath the signal transmission line.Type: ApplicationFiled: April 29, 2004Publication date: November 3, 2005Inventors: Anil Chinthakindi, Robert Groves, Youri Tretiakov, Kunal Vaed, Richard Volant
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Publication number: 20050242373Abstract: The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do not include a self-aligned silicide and a self-aligned emitter contact border. The present invention also is related to methods of fabricating the inventive bipolar transistor structure. In the methods of the present invention, a block emitter polysilicon region replaces a conventional T-shaped emitter polysilicon.Type: ApplicationFiled: July 5, 2005Publication date: November 3, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Ahlgren, Gregory Freeman, Marwan Khater, Richard Volant
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Publication number: 20050167780Abstract: An inductor and a method of forming and the inductor, the method including: (a) providing a semiconductor substrate; (b) forming a dielectric layer on a top surface of the substrate; (c) forming a lower trench in the dielectric layer; (d) forming a resist layer on a top surface of the dielectric layer; (e) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and (f) completely filling the lower trench at least partially filling the upper trench with a conductor in order to form the inductor. The inductor including a top surface, a bottom surface and sidewalls, a lower portion of said inductor extending a fixed distance into a dielectric layer formed on a semiconductor substrate and an upper portion extending above said dielectric layer; and means to electrically contact said inductor.Type: ApplicationFiled: January 29, 2004Publication date: August 4, 2005Applicant: International Business Machines CorporationInventors: Daniel Edelstein, Panayotis Andricacos, John Cotte, Hariklia Deligianni, John Magerlein, Kevin Petrarca, Kenneth Stein, Richard Volant
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Publication number: 20050121803Abstract: Disclosed is a reinforced bond pad structure having nonplanar dielectric structures and a metallic bond layer conformally formed over the nonplanar dielectric structures. The nonplanar dielectric structures are substantially reproduced in the metallic bond layer so as to form nonplanar metallic structures. Surrounding each of the nonplanar metallic structures is a ring of dielectric material which provides a hard stop during probing of the bond pad so as to limit the amount of bond pad that can be removed during probing.Type: ApplicationFiled: January 6, 2005Publication date: June 9, 2005Inventors: David Angell, Frederic Beaulieu, Takashi Hisada, Adreanne Kelly, Samuel McKnight, Hiromitsu Miyai, Kevin Petrarca, Wolfgang Sauter, Richard Volant, Caitlin Weinstein
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Publication number: 20050121748Abstract: The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do not include a self-aligned silicide and a self-aligned emitter contact border. The present invention also is related to methods of fabricating the inventive bipolar transistor structure. In the methods of the present invention, a block emitter polysilicon region replaces a conventional T-shaped emitter polysilicon.Type: ApplicationFiled: December 4, 2003Publication date: June 9, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Ahlgren, Gregory Freeman, Marwan Khater, Richard Volant
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Publication number: 20050062170Abstract: A method of forming wire bonds in (I/C) chips comprising: providing an I/C chip having a conductive pad for a wire bond with at least one layer of dielectric material overlying the pad; forming an opening through the dielectric material exposing a portion of said pad. Forming at least a first conductive layer on the exposed surface of the pad and on the surface of the opening. Forming a seed layer on the first conductive layer; applying a photoresist over the seed layer; exposing and developing the photoresist revealing the surface of the seed layer surrounding the opening; removing the exposed seed layer; removing the photoresist material in the opening revealing the seed layer. Plating at least one second layer of conductive material on the seed layer in the opening, and removing the first conductive layer on the dielectric layer around the opening. The invention also includes the resulting structure.Type: ApplicationFiled: September 18, 2003Publication date: March 24, 2005Applicant: International Business Machines CorporationInventors: Julie Biggs, Tien-Jen Cheng, David Eichstadt, Lisa Fanti, Jonathan Griffith, Randolph Knarr, Sarah Knickerbocker, Kevin Petrarca, Roger Quon, Wolfgang Sauter, Kamalesh Srivastava, Richard Volant
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Publication number: 20050007217Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400°0 C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.Type: ApplicationFiled: July 8, 2003Publication date: January 13, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hariklia Deligianni, Panayotis Andricacos, L. Buchwalter, John Cotte, Christopher Jahnes, Mahadevaiyer Krishnan, John Magerlein, Kenneth Stein, Richard Volant, James Tornello, Jennifer Lund