Abstract: Monolithic humidity sensor devices, and methods of manufacture. The devices include circuitry on or over a silicon substrate. A primary passivation barrier is formed over the circuitry with conductive vias therethrough; a capacitor, comprising metal fingers with spaces therebetween, is formed above said primary passivation barrier and electrically coupled by the conductive vias to the circuitry. A secondary passivation barrier is formed over the capacitor. A hygroscopic material layer is formed over the secondary passivation barrier, wherein the capacitor is operable to exhibit a capacitance value responsive to moisture present in the hygroscopic material layer and the circuitry is operable to generate a signal responsive to said capacitance value.

Abstract: A microelectronic device has a Hall sensor that includes a Hall plate in a semiconductor material. The Hall sensor includes contact regions in the semiconductor material, contacting the Hall plate. The Hall sensor includes an isolation structure with a dielectric material contacting the semiconductor material, on at least two opposite sides of each of the contact regions. The isolation structure is laterally separated from the contact regions by gaps. The Hall sensor further includes a conductive spacer over the gaps, the conductive spacer being separated from the semiconductor material by an insulating layer.

Abstract: A microelectronic device has a Hall sensor that includes a Hall plate in a semiconductor material. The Hall sensor includes contact regions in the semiconductor material, contacting the Hall plate. The Hall sensor includes an isolation structure with a dielectric material contacting the semiconductor material, on at least two opposite sides of each of the contact regions. The isolation structure is laterally separated from the contact regions by gaps. The Hall sensor further includes a conductive spacer over the gaps, the conductive spacer being separated from the semiconductor material by an insulating layer.

Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.

Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.

Abstract: Monolithic humidity sensor devices, and methods of manufacture. The devices include circuitry on or over a silicon substrate. A primary passivation barrier is formed over the circuitry with conductive vias therethrough; a capacitor, comprising metal fingers with spaces therebetween, is formed above said primary passivation barrier and electrically coupled by the conductive vias to the circuitry. A secondary passivation barrier is formed over the capacitor. A hygroscopic material layer is formed over the secondary passivation barrier, wherein the capacitor is operable to exhibit a capacitance value responsive to moisture present in the hygroscopic material layer and the circuitry is operable to generate a signal responsive to said capacitance value.

Abstract: A semiconductor system includes a substrate. The substrate has a front side and a back side. A device is formed on the front side of the substrate. A vertical spring is etched in the substrate about the device. A trench is etched in the front side of the substrate about the device. A wall of the trench forms a side of the vertical spring.

Abstract: A micromechanical system (MEMS) acoustic wave resonator is formed on a base substrate. A piezoelectric member is mounted on the base substrate. The piezoelectric member has a first electrode covering a first surface of the piezoelectric member and a second electrode covering a second surface of the piezoelectric member opposite the first electrode, the second electrode being bounded by a perimeter edge. A first guard ring is positioned on the second electrode spaced apart from the perimeter edge of the second electrode.

Abstract: A structure includes a substrate which includes a surface. The structure also includes a horizontal-type Hall sensor positioned within the substrate and below the surface of the substrate. The structure further includes a patterned magnetic concentrator positioned above the surface of the substrate, and a protective overcoat layer positioned above the magnetic concentrator.

Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.

Abstract: Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate.

Abstract: A structure includes a substrate which includes a surface. The structure also includes a horizontal-type Hall sensor positioned within the substrate and below the surface of the substrate. The structure further includes a patterned magnetic concentrator positioned above the surface of the substrate, and a protective overcoat layer positioned above the magnetic concentrator.

Abstract: In examples, a semiconductor package comprises a first conductive terminal; a second conductive terminal; a conductive pathway coupling the first and second conductive terminals, the conductive pathway configured to generate a magnetic field; a semiconductor die including a circuit configured to detect the magnetic field; and first and second polyimide layers positioned between the conductive pathway and the semiconductor die.

Abstract: An electronic device comprises: a molybdenum layer; a bond pad formed on the molybdenum layer, the bond pad comprising aluminum; and a wire bonded to the bond pad, the wire comprising gold.

Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.

Abstract: A micromechanical system (MEMS) acoustic wave resonator is formed on a base substrate. A piezoelectric member is mounted on the base substrate. The piezoelectric member has a first electrode covering a first surface of the piezoelectric member and a second electrode covering a second surface of the piezoelectric member opposite the first electrode, the second electrode being bounded by a perimeter edge. A first guard ring is positioned on the second electrode spaced apart from the perimeter edge of the second electrode.

Abstract: An integrated fluxgate device has a magnetic core disposed over a semiconductor substrate. A first winding is disposed in a first metallization level above and a second metallization level below the magnetic core, and is configured to generate a first magnetic field in the magnetic core. A second winding is disposed in the first and second metallization levels and is configured to generate a second magnetic field in the magnetic core. A third winding is disposed in the first and second metallization levels and is configured to sense a magnetic field in the magnetic core that is the net of the first and second magnetic fields.

Abstract: In described examples of a micromechanical system (MEMS), a rigid cantilevered platform is formed on a base substrate. The cantilevered platform is anchored to the base substrate by only a single anchor point. A MEMS resonator is formed on the cantilevered platform.

Abstract: Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate.

Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.