Patents by Inventor Rie Takada

Rie Takada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5910755
    Abstract: A laminate capacitor circuit board which permits constants of various kinds of circuit elements to be set by selectively effected connections between wiring layers, and a laminate capacitor circuit board which permits distributed circuit constants in a high-frequency wiring layer sandwiched between two shielding wiring layers to be set as desired. These circuits are formed with at least a pattern of a conductive foil on each dielectric layer, and include a plurality of wiring layers laminated one upon another, a wiring layer for connections laminated to a surface of the plurality of wiring layers laminated one upon another, a plurality of terminal patterns formed on the wiring layer for connections in a state insulated from each other, a plurality of vias for electrically connecting at least two of the plurality of terminal patterns to corresponding ones of the plurality of wiring layers, and connecting means for selectively connecting the plurality of terminal patterns to each other.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: June 8, 1999
    Assignee: Fujitsu Limited
    Inventors: Hidehiro Mishiro, Kenichiro Tsubone, Mitsunori Abe, Rie Takada
  • Patent number: 5886309
    Abstract: A matrix switch board used for connecting and disconnecting a switching-system line and a subscriber line. The matrix switch board includes a board made of an insulating material, and first and second wiring patterns respectively formed on front and back sides of the board so as to cross each other. The matrix switch board further includes through holes provided at cross points of the first and second wiring patterns. In the matrix switch board, when a connection pin is inserted into at least one of the through holes, at least one of the first wiring patterns on the front side and at least one of the second wiring patterns on the back side are electrically connected to each other.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: March 23, 1999
    Assignee: Fujitsu Limited
    Inventors: Masao Hosogai, Setuo Kojima, Hitoshi Yokemura, Rie Takada, Hiroyuki Otaguro, Takayuki Ashida, Toshio Abe
  • Patent number: D382584
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: August 19, 1997
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Rie Takada
  • Patent number: D384695
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: October 7, 1997
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Rie Takada
  • Patent number: D386202
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: November 11, 1997
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Rie Takada
  • Patent number: D404420
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: January 19, 1999
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Rie Takada, Hidetoshi Kimura