Patents by Inventor Riichiro Takemura

Riichiro Takemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10481125
    Abstract: To a biomolecule measuring apparatus, a semiconductor sensor for detecting ions generated by a reaction between a biomolecular sample and a reagent is set. The semiconductor sensor has a plurality of cells which are arranged on a semiconductor substrate, and each of which detects ions, and a plurality of readout wires. Each of the plurality of cells has an ISFET which has a floating gate and which detects ions, a first MOSFET M2 for amplifying an output from the ISFET, and a second MOSFET M3 which selectively transmits an output from the first MOSFET to a corresponding readout wire R1. Each of the plurality of cells is provided with a third MOSFET M1 which generates hot electrons in the ISFET and which injects a charge to the floating gate of the ISFET. Here, the second MOSFET and the third MOSFET are separately controlled.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: November 19, 2019
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Takayuki Kawahara, Yoshimitsu Yanagawa, Naoshi Itabashi, Riichiro Takemura
  • Patent number: 10030266
    Abstract: In the field of the next generation DNA sequencer, a method for integrating very high sensitive FET sensors having side gates and nanopores as devices used for identifying four kinds of base and for mapping the base sequence of DNA without using reagents, and a semiconductor device having selection transistors and amplifier transistors respectively corresponding to the FET sensors having side gates and nanopores respectively so as to be able to read the variation of a detection current based on the differences among the charges of the four kinds of base without deteriorating the detection sensitivity of the FET sensor, are presented.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: July 24, 2018
    Assignee: HITACHI, LTD.
    Inventors: Itaru Yanagi, Riichiro Takemura, Yoshimitsu Yanagawa, Takahide Yokoi, Takashi Anazawa
  • Patent number: 9725753
    Abstract: Provided is a device that, on the basis of a measurement result of a current that has a low value and a wide distribution, identifies the composition of biological molecules passing through a nanoparticle path. This biomolecule information analysis device obtains a current value by applying an electrical field to biomolecules passing through a gap between a first electrode and a second electrode, and identifies the structure of the biomolecules by integrating the current value and making a comparison with a reference value (see FIG. 1).
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: August 8, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Ono, Tatsuo Nakagawa, Yoshimitsu Yanagawa, Takayuki Kawahara, Akira Kotabe, Riichiro Takemura
  • Publication number: 20170047376
    Abstract: A semiconductor storage device includes: a semiconductor substrate; a first storage unit; a second storage unit including a plurality of the first storage units formed in a first direction parallel to the semiconductor substrate; a third storage unit including a plurality of the second storage units formed in a second direction perpendicular to the first direction and parallel to the semiconductor substrate; and a fourth storage unit including a plurality of the third storage units in a third direction perpendicular to the semiconductor substrate. A plurality of contacts coupling signal lines each configured to select an address in the second direction and the semiconductor substrate, is arranged in a region in which no interference with bit lines extending in the first direction occurs. Therefore, the semiconductor storage can perform reading and writing for large capacity at a high speed, and can be manufactured at a low cost, can be achieved.
    Type: Application
    Filed: June 2, 2014
    Publication date: February 16, 2017
    Inventors: Kenzo KUROTSUCHI, Riichiro TAKEMURA, Yoshitaka SASAGO
  • Publication number: 20160245777
    Abstract: To a biomolecule measuring apparatus, a semiconductor sensor for detecting ions generated by a reaction between a biomolecular sample and a reagent is set. The semiconductor sensor has a plurality of cells which are arranged on a semiconductor substrate, and each of which detects ions, and a plurality of readout wires. Each of the plurality of cells has an ISFET which has a floating gate and which detects ions, a first MOSFET M2 for amplifying an output from the ISFET, and a second MOSFET M3 which selectively transmits an output from the first MOSFET to a corresponding readout wire R1. Each of the plurality of cells is provided with a third MOSFET M1 which generates hot electrons in the ISFET and which injects a charge to the floating gate of the ISFET. Here, the second MOSFET and the third MOSFET are separately controlled.
    Type: Application
    Filed: October 2, 2014
    Publication date: August 25, 2016
    Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Takayuki Kawahara, Yoshimitsu Yanagawa, Naoshi Itabashi, Riichiro Takemura
  • Publication number: 20160122815
    Abstract: In the field of the next generation DNA sequencer, a method for integrating very high sensitive FET sensors having side gates and nanopores as devices used for identifying four kinds of base and for mapping the base sequence of DNA without using reagents, and a semiconductor device having selection transistors and amplifier transistors respectively corresponding to the FET sensors having side gates and nanopores respectively so as to be able to read the variation of a detection current based on the differences among the charges of the four kinds of base without deteriorating the detection sensitivity of the FET sensor, are presented.
    Type: Application
    Filed: June 27, 2013
    Publication date: May 5, 2016
    Inventors: Itaru YANAGI, Riichiro TAKEMURA, Yoshimitsu YANAGAWA, Takahide YOKOI, Takashi ANAZAWA
  • Patent number: 9318178
    Abstract: Since a nonvolatile RAM allows random reading and writing operations, an erasing mode is unnecessary. From the system side, however, it is desirable to have the erasing mode because of its nonvolatile characteristic. Moreover, the erasing operation is desirably carried out at high speed with low power consumption. Therefore, memory cell arrays COA and DTA containing a plurality of memory cells MC each having a magnetoresistive element are provided, a series of data is written to the memory cell arrays COA and DTA, and at the time of erasing, an erasing operation is carried out by writing predetermined data only to the memory cell array COA.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: April 19, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Kawahara, Riichiro Takemura, Kazuo Ono, Nobuaki Kohinata
  • Patent number: 9257483
    Abstract: There is provided a magnetic memory with using a magnetoresistive effect element of a spin-injection magnetization reversal type, in which a multi-value operation is possible and whose manufacturing and operation are simple. A preferred aim of this is solved by providing two or more magnetoresistive effect elements which are electrically connected in series to each other and by selecting one of the series-connected elements depending on a direction of a current carried in the series-connected elements, a magnitude thereof, and an order of the current thereof for performing the writing operation. For example, it is solved by differentiating plane area sizes of the respective magnetoresistive effect elements which have the same film structure from each other so as to differentiate resistance change amounts caused by respective magnetization reversal and threshold current values required for respective magnetization reversal from each other.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: February 9, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigaki, Takayuki Kawahara, Riichiro Takemura, Kazuo Ono, Kenchi Ito
  • Patent number: 9177628
    Abstract: An array configuration capable of supplying a necessary and sufficient current in a small area is achieved and a reference cell configuration suitable to temperature characteristics of a TMR element is achieved. In a memory using inversion of spin transfer switching, a plurality of program drivers are arranged separately along one global bit line, and one sense amplifier is provided to one global bit line. A reference cell to which “1” and “0” are programmed is shared by two arrays and a sense amplifier.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: November 3, 2015
    Assignee: HITACHI, LTD.
    Inventors: Takayuki Kawahara, Riichiro Takemura, Kazuo Ono
  • Publication number: 20150137386
    Abstract: There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply different from the first power supply and that penetrate through a substrate structure. The semiconductor device also includes a through-substrate via string composed by the first and second through-substrate vias, in which the first through-substrate vias are located adjacent to one another and the second through-substrate vias are also located adjacent to one another. The through-substrate via string is disposed in the substrate structure for extending in a first direction.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 21, 2015
    Applicant: PS4 Luxco S.a.r.l.
    Inventors: Kazuo ONO, Riichiro TAKEMURA, Takamasa SUZUKI, Kazuhiko KAJIGAYA, Akira KOTABE, Yoshimitsu YANAGAWA
  • Publication number: 20150036423
    Abstract: An array configuration capable of supplying a necessary and sufficient current in a small area is achieved and a reference cell configuration suitable to temperature characteristics of a TMR element is achieved. In a memory using inversion of spin transfer switching, a plurality of program drivers are arranged separately along one global bit line, and one sense amplifier is provided to one global bit line. A reference cell to which “1” and “0” are programmed is shared by two arrays and a sense amplifier.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 5, 2015
    Inventors: Takayuki Kawahara, Riichiro Takemura, Kazuo Ono
  • Patent number: 8922025
    Abstract: There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply different from the first power supply and that penetrate through a substrate structure. The semiconductor device also includes a through-substrate via string composed by the first and second through-substrate vias, in which the first through-substrate vias are located adjacent to one another and the second through-substrate vias are also located adjacent to one another. The through-substrate via string is disposed in the substrate structure for extending in a first direction.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: December 30, 2014
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Kazuo Ono, Riichiro Takemura, Takamasa Suzuki, Kazuhiko Kajigaya, Akira Kotabe, Yoshimitsu Yanagawa
  • Patent number: 8837209
    Abstract: A relation between a drive current of a selection transistor of a magnetic memory and a threshold magnetization switching current of the magnetoresistance effect element is optimized. In order to optimize the relation between the drive current of the selection transistor and the threshold magnetization switching current of the magnetoresistance effect element 101 of the magnetic memory cell, a mechanism 601-604 for dropping the threshold magnetization switching current on “1” writing is provided that applies a magnetic field that is in the inverse direction of the pinned layer to the recording layer of the magnetoresistance effect element.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: September 16, 2014
    Assignees: Hitachi, Ltd., Tohoku University
    Inventors: Hideo Ohno, Shoji Ikeda, Katsuya Miura, Kazuo Ono, Riichiro Takemura, Hiromasa Takahashi
  • Patent number: 8837251
    Abstract: An array configuration capable of supplying a necessary and sufficient current in a small area is achieved and a reference cell configuration suitable to temperature characteristics of a TMR element is achieved. In a memory using inversion of spin transfer switching, a plurality of program drivers are arranged separately along one global bit line, and one sense amplifier is provided to one global bit line. A reference cell to which “1” and “0” are programmed is shared by two arrays and a sense amplifier.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: September 16, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Kawahara, Riichiro Takemura, Kazuo Ono
  • Patent number: 8750032
    Abstract: The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: June 10, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Kawahara, Riichiro Takemura, Takashi Ishigaki, Kiyoo Itoh
  • Publication number: 20140154790
    Abstract: Provided is a device that, on the basis of a measurement result of a current that has a low value and a wide distribution, identifies the composition of biological molecules passing through a nanoparticle path. This biomolecule information analysis device obtains a current value by applying an electrical field to biomolecules passing through a gap between a first electrode and a second electrode, and identifies the structure of the biomolecules by integrating the current value and making a comparison with a reference value (see FIG. 1).
    Type: Application
    Filed: May 31, 2011
    Publication date: June 5, 2014
    Applicant: HITACHI, LTD.
    Inventors: Kazuo Ono, Tatsuo Nakagawa, Yoshimitsu Yanagawa, Takayuki Kawahara, Akira Kotabe, Riichiro Takemura
  • Patent number: 8638121
    Abstract: A device is disclosed herein, which may be used a level-shift circuit. The device includes first, second and third power supply lines supplied respectively with first, second and third power voltages that are different from one another, first and second input terminals and an output terminal, an output circuit coupled to the first power supply line, the first and second input terminals and the output terminal, a first inverter including an input node coupled to the first input terminal and an output node coupled to the second input terminal, a first transistor coupled in series to the first inverter between the second and third power supply lines, the first transistor being rendered non-conductive to deactivate the first inverter, and a control circuit configured to prevent the output terminal from being brought into an electrical floating state during deactivation of the first inverter.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: January 28, 2014
    Inventors: Takamasa Suzuki, Akira Kotabe, Tomonori Sekiguchi, Riichiro Takemura
  • Publication number: 20130328187
    Abstract: There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply different from the first power supply and that penetrate through a substrate structure. The semiconductor device also includes a through-substrate via string composed by the first and second through-substrate vias, in which the first through-substrate vias are located adjacent to one another and the second through-substrate vias are also located adjacent to one another. The through-substrate via string is disposed in the substrate structure for extending in a first direction.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 12, 2013
    Inventors: Kazuo ONO, Riichiro TAKEMURA, Takamasa SUZUKI, Kazuhiko KAJIGAYA, Akira KOTABE, Yoshimitsu YANAGAWA
  • Patent number: 8587995
    Abstract: For example, one memory cell is configured using two memory cell transistors and one phase change element by disposing a plurality of diffusion layers in parallel to a bit-line, disposing gates between the diffusion layers so as to cross the bit-line, disposing bit-line contacts and source contacts alternately to the plurality of diffusion layers arranged in a bit-line direction for each diffusion layer, and providing a phase change element on the source contact. Also, the phase change element can be provided on the bit-line contact instead of the source contact. By this means, for example, increase in drivability of the memory cell transistors and reduction in area can be realized.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: November 19, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Riichiro Takemura, Kenzo Kurotsuchi, Takayuki Kawahara
  • Publication number: 20130261413
    Abstract: To obtain a blood sugar level accurately, the location of a blood-vessel part is specified by using a first wavelength at which absorption by hemoglobin, which is a component unique to blood, is high, and data of light absorbance measured by using a second wavelength at which absorption by glucose is high is separated into a blood-vessel part and other parts.
    Type: Application
    Filed: October 14, 2010
    Publication date: October 3, 2013
    Applicant: HITACHI, LTD.
    Inventors: Takayuki Kawahara, Riichiro Takemura, Tsuyoshi Sonehara, Akio Nagasaka