Patents by Inventor Rina Tanaka
Rina Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12051744Abstract: An object is to provide a technique capable of reducing a parasitic capacitance in a semiconductor device with high accuracy. A semiconductor device includes: a base region; a source region; a second trench passing through the base region to reach the drift layer; a second protective layer disposed in a bottom portion of the second trench; a source electrode, at least part of which is disposed in the second trench, to be electrically connected to a first protective layer, the base region, and the source region; and a source side connection layer of a second conductivity type constituting at least part of a lateral portion of the second trench and connected to the base region and the second protective layer.Type: GrantFiled: December 23, 2019Date of Patent: July 30, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Katsutoshi Sugawara, Yutaka Fukui, Rina Tanaka, Hideyuki Hatta
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Patent number: 11894428Abstract: The present invention relates to a silicon carbide semiconductor device that includes a Schottky barrier diode in a field-effect transistor and includes a first trench provided through first and second semiconductor regions in a thickness direction and reaches inside a semiconductor layer, a second trench provided through the second semiconductor region in the thickness direction and reaches inside the semiconductor layer, a gate electrode embedded in the first trench via a gate insulating film, a Schottky barrier diode electrode embedded in the second trench, a first low-resistance layer having contact with a trench side wall of the first trench, and a second low-resistance layer having contact with a trench side wall of the second trench. The second low-resistance layer has an impurity concentration that is higher than the impurity concentration in the semiconductor layer and lower than the impurity concentration in the first low-resistance layer.Type: GrantFiled: March 18, 2019Date of Patent: February 6, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Hideyuki Hatta, Rina Tanaka, Katsutoshi Sugawara, Yutaka Fukui
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Patent number: 11848358Abstract: A drift layer is made of silicon carbide and has a first conductivity type. At least one trench has a first side surface facing a Schottky barrier diode region, and a second side surface extending in a transistor region and contacting a source region, a body region, and the drift layer. A first protective region is provided under the at least one trench, has a second conductivity type, and is higher in impurity concentration of the second conductivity type than the body region. A second protective region extends from the first protective region, reaches at least one of the first side surface and an end region of the second side surface continuous with the first side surface, has an uppermost portion shallower than a lowermost portion of the body region, and is higher in impurity concentration of the second conductivity type than the body region.Type: GrantFiled: December 10, 2018Date of Patent: December 19, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Rina Tanaka, Katsutoshi Sugawara, Yutaka Fukui, Hideyuki Hatta, Yusuke Miyata
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Publication number: 20230290874Abstract: A method of manufacturing a silicon carbide semiconductor device includes a step of forming gate trench, a step of forming Schottky trench, a step of forming a silicon oxide film in the gate trench and the Schottky trench, a step of forming a polycrystalline silicon film inside the silicon oxide film, a step of etching back the polycrystalline silicon film, a step of forming an interlayer insulating film on a gate electrode in the gate trench, a step of removing, by wet etching, the polycrystalline silicon film in the Schottky trench after opening a hole in the interlayer insulating film, a step of forming an ohmic electrode on a source region, a step of removing the silicon oxide film in the Schottky trench, and a step of forming a source electrode in the Schottky trench, which is in Schottky junction with a drift layer.Type: ApplicationFiled: September 30, 2020Publication date: September 14, 2023Applicant: Mitsubishi Electric CorporationInventors: Motoru YOSHIDA, Rina TANAKA, Yutaka FUKUI, Hideyuki HATTA
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Publication number: 20230215942Abstract: A semiconductor device according to the present disclosure includes: a gate electrode provided in a gate trench and provided so as to oppose a source region via a gate insulating film; a first bottom protection region of a second conductivity type provided below the gate insulating film; a plurality of first connection regions of the second conductivity type provided at a first interval in an extension direction of the gate trench and electrically connecting the first bottom protection region and a body region; a Schottky electrode provided in a Schottky trench; a second bottom protection region of the second conductivity type provided below the Schottky electrode; and a plurality of second connection regions of the second conductivity type provided at a second interval smaller than the first interval in an extension direction of the Schottky trench and electrically connecting the second bottom protection region and the body region.Type: ApplicationFiled: August 25, 2020Publication date: July 6, 2023Applicant: Mitsubishi Electric CorporationInventors: Rina TANAKA, Hideyuki HATTA, Motoru YOSHIDA, Yutaka FUKUI, Shiro HINO
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Patent number: 11643475Abstract: It is an object of the present invention to provide a thickener capable of exhibiting excellent light resistance. The present invention relates to a thickener comprising cellulose fibers having a fiber width of 8 nm or less and water, wherein the thickener is a slurry or a gel, and when the thickener is filled in a colorless and transparent glass cell having an inside dimension of 1 cm in depth×4 cm in width×4.5 cm in height and the thickener is then irradiated with ultraviolet rays with a wavelength of 300 nm or more and 400 nm or less, using a xenon lamp, from the side of the maximum area surface of the glass cell, so as to be an irradiance of 180 W/m2 and an integrated light amount of 500 mJ/m2, the amount of a change in the yellowness before and after ultraviolet irradiation measured in accordance with JIS K 7373 is 10 or less.Type: GrantFiled: October 3, 2017Date of Patent: May 9, 2023Assignee: OJI HOLDINGS CORPORATIONInventors: Hayato Fushimi, Rina Tanaka
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Patent number: 11637184Abstract: A drift layer is formed of silicon carbide and has a first conductivity type. A trench bottom protective layer is provided on a bottom portion of a gate trench and has a second conductivity type. A depletion suppressing layer is provided between a side surface of the gate trench and the drift layer, extends from a lower portion of a body region up to a position deeper than the bottom portion of the gate trench, has the first conductivity type, and has an impurity concentration of the first conductivity type higher than that of the drift layer. The impurity concentration of the first conductivity type of the depletion suppressing layer is reduced as the distance from the side surface of the gate trench becomes larger.Type: GrantFiled: January 11, 2018Date of Patent: April 25, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Kohei Adachi, Katsutoshi Sugawara, Yutaka Fukui, Hideyuki Hatta, Rina Tanaka
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Publication number: 20220406897Abstract: A silicon carbide semiconductor device includes: a body region of a second conductivity type provided on a drift layer of a first conductivity type; a source region of a first conductivity type provided on the body region; a source electrode connected to the source region; a gate insulating film provided on an inner surface of a trench; a gate electrode provided inside the trench with interposition of the gate insulating film; a protective layer of a second conductivity type provided below the gate insulating film; a connection layer of a second conductivity type being in contact with the protective layer and the body region; and an electric field relaxation layer of a second conductivity type being in contact with a bottom surface of the connection layer, provided below the connection layer, and having a lower impurity concentration of a second conductivity type than the connection layer.Type: ApplicationFiled: November 28, 2019Publication date: December 22, 2022Applicant: Mitsubishi Electric CorporationInventors: Rina TANAKA, Yutaka FUKUI, Hideyuki HATTA, Kohei ADACHI
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Publication number: 20220305170Abstract: The present invention relates to a wound covering material containing at least a hydrogel, wherein the hydrogel contains fine fibrous celluloses having ionic substituents. The present invention also relates to a method of producing the wound covering material, including a process of obtaining a hydrogel using a mixture of hydrophilic polymers and fine fibrous celluloses having ionic substituents. Accordingly, there are provided a wound covering material having excellent water retention and strength and favorable adhesiveness and peelability with respect to a living body, and a method of producing the same.Type: ApplicationFiled: July 1, 2020Publication date: September 29, 2022Applicant: OJl HOLDINGS CORPORATIONInventors: Rina TANAKA, Chinatsu MIYAZAKI, Yuko TANAKA, Minoru SUGIYAMA, Kunihiro OHSHIMA
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Publication number: 20220149167Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.Type: ApplicationFiled: January 21, 2022Publication date: May 12, 2022Applicant: Mitsubishi Electric CorporationInventors: Yutaka FUKUI, Katsutoshi SUGAWARA, Hideyuki HATTA, Hidenori KOKETSU, Rina TANAKA, Yusuke MIYATA
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Publication number: 20220102503Abstract: The present invention relates to a silicon carbide semiconductor device that includes a Schottky barrier diode in a field-effect transistor and includes a first trench provided through first and second semiconductor regions in a thickness direction and reaches inside a semiconductor layer, a second trench provided through the second semiconductor region in the thickness direction and reaches inside the semiconductor layer, a gate electrode embedded in the first trench via a gate insulating film, a Schottky barrier diode electrode embedded in the second trench, a first low-resistance layer having contact with a trench side wall of the first trench, and a second low-resistance layer having contact with a trench side wall of the second trench. The second low-resistance layer has an impurity concentration that is higher than the impurity concentration in the semiconductor layer and lower than the impurity concentration in the first low-resistance layer.Type: ApplicationFiled: March 18, 2019Publication date: March 31, 2022Applicant: Mitsubishi Electric CorporationInventors: Hideyuki HATTA, Rina TANAKA, Katsutoshi SUGAWARA, Yutaka FUKUI
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Patent number: 11271084Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.Type: GrantFiled: May 30, 2018Date of Patent: March 8, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yutaka Fukui, Katsutoshi Sugawara, Hideyuki Hatta, Hidenori Koketsu, Rina Tanaka, Yusuke Miyata
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Patent number: 11251299Abstract: A drift layer made of silicon carbide has a first conductivity type. A body region on the drift layer has a second conductivity type. A source region on the body region has the first conductivity type. A gate insulating film is on each inner wall of at least one trench. A protective layer has at least a portion below the trench, is in contact with the drift layer, and has the second conductivity type. A first low-resistance layer is in contact with the trench and the protective layer, straddles a border between the trench and the protective layer in the depth direction, has the first conductivity type, and has a higher impurity concentration than the drift layer. A second low-resistance layer is in contact with the first low-resistance layer, is away from the trench, has the first conductivity type, and has a higher impurity concentration than the first low-resistance layer.Type: GrantFiled: March 28, 2018Date of Patent: February 15, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Rina Tanaka, Katsutoshi Sugawara, Yutaka Fukui, Hideyuki Hatta, Yusuke Miyata
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Publication number: 20220037474Abstract: A drift layer is made of silicon carbide and has a first conductivity type. At least one trench has a first side surface facing a Schottky barrier diode region, and a second side surface extending in a transistor region and contacting a source region, a body region, and the drift layer. A first protective region is provided under the at least one trench, has a second conductivity type, and is higher in impurity concentration of the second conductivity type than the body region. A second protective region extends from the first protective region, reaches at least one of the first side surface and an end region of the second side surface continuous with the first side surface, has an uppermost portion shallower than a lowermost portion of the body region, and is higher in impurity concentration of the second conductivity type than the body region.Type: ApplicationFiled: December 10, 2018Publication date: February 3, 2022Applicant: Mitsubishi Electric CorporationInventors: Rina TANAKA, Katsutoshi SUGAWARA, Yutaka FUKUI, Hideyuki HATTA, Yusuke MIYATA
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Publication number: 20220024826Abstract: Provided is fibrous cellulose used for producing a concrete-pump pressure-feeding primer containing calcium carbonate powder, which is excellent in a dispersion stability and a pressure-feeding property. The fibrous cellulose is used for producing the concrete-pump pressure-feeding primer through mixing with the calcium carbonate powder. The fibrous cellulose contains ultrafine fibrous modified cellulose which has an ionic group and has a fiber width of 1,000 nm or less.Type: ApplicationFiled: December 6, 2019Publication date: January 27, 2022Applicant: OJI HOLDINGS CORPORATIONInventors: Rina TANAKA, Yoshiyuki TSUTSUMI, Hiroki YAMAMOTO
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Publication number: 20220005947Abstract: An object is to provide a technique capable of reducing a parasitic capacitance in a semiconductor device with high accuracy. A semiconductor device includes: a base region; a source region; a second trench passing through the base region to reach the drift layer; a second protective layer disposed in a bottom portion of the second trench; a source electrode, at least part of which is disposed in the second trench, to be electrically connected to a first protective layer, the base region, and the source region; and a source side connection layer of a second conductivity type constituting at least part of a lateral portion of the second trench and connected to the base region and the second protective layer.Type: ApplicationFiled: December 23, 2019Publication date: January 6, 2022Applicant: Mitsubishi Electric CorporationInventors: Katsutoshi SUGAWARA, Yutaka FUKUI, Rina TANAKA, Hideyuki HATTA
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Patent number: 11158704Abstract: A semiconductor device including: a trench gate; a trench-bottom protecting layer of a second conductivity type provided in a semiconductor layer of a first conductivity type while contacting a bottom of trenches; and a depletion suppressing layer of the first conductivity type provided between adjacent trench-bottom protecting layers, wherein the depletion suppressing layer includes an intermediate point that is horizontally equidistant to the adjacent trench-bottom protecting layers and is formed of a size to contact neither the trenches nor the trench-bottom protecting layers, and an impurity concentration of the depletion suppressing layer is set higher than an impurity concentration of the semiconductor layer.Type: GrantFiled: January 18, 2017Date of Patent: October 26, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Kohei Adachi, Katsutoshi Sugawara, Yutaka Fukui, Rina Tanaka, Kazuya Konishi
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Publication number: 20210288156Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.Type: ApplicationFiled: May 30, 2018Publication date: September 16, 2021Applicant: Mitsubishi Electric CorporationInventors: Yutaka FUKUI, Katsutoshi SUGAWARA, Hideyuki HATTA, Hidenori KOKETSU, Rina TANAKA, Yusuke MIYATA
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Publication number: 20210222366Abstract: It is an object of the present invention to provide a composition comprising cellulose fibers having a fiber width of 1000 nm or less, the properties of which are maintained even after long-term storage.Type: ApplicationFiled: August 7, 2017Publication date: July 22, 2021Applicant: Oji Holdings CorporationInventors: Rina TANAKA, Koh SAKAI, Hirokazu SUNAGAWA
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Publication number: 20210222367Abstract: It is an object of the present invention to provide an ultrafine cellulose fiber-containing composition having favorable dispersibility even in the presence of a specific organic solvent. The present invention relates to a cellulose fiber-containing composition comprising cellulose fibers having a fiber width of 1000 nm or less, water, and alcohol, wherein the alcohol is at least one type selected from monovalent primary alcohol, monovalent secondary alcohol, and polyhydric alcohol, and the dielectric constant of the cellulose fiber-containing composition at 25° C. is 55 or more and less than 80.Type: ApplicationFiled: December 12, 2017Publication date: July 22, 2021Applicant: OJI HOLDINGS CORPORATIONInventors: Rina TANAKA, Hayato FUSHIMI, Kazuo YAMANE