Patents by Inventor Robert A. Hutchins

Robert A. Hutchins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9666225
    Abstract: In one embodiment, a system includes a data processing unit configured to read encoded data from a magnetic tape medium. The data processing unit is also configured to decode a plurality of codeword interleaves (CWIs) from the encoded data, each CWI being a row in a sub data set logically organized into a two-dimensional array. The array includes a predetermined number of rows and columns of predetermined lengths. The data processing unit is also configured to determine an address for a first-written CWI without successfully decoding a corresponding codeword interleave designation (CWID) from the encoded data, each CWID specifying an address for a corresponding CWI. Also, each CWID is calculated as a function of a logical track number and a CWI set number.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: May 30, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Roy D. Cideciyan, Simeon Furrer, Robert A. Hutchins, Mark A. Lantz, Keisuke Tanaka
  • Patent number: 9659593
    Abstract: According to one embodiment, a method for processing data includes directing first data through a first FIR gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The method also includes directing second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: May 23, 2017
    Assignee: International Business Machines Corporation
    Inventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
  • Publication number: 20170133046
    Abstract: In one embodiment, a method includes computing more than one skew estimate within each timing-based servo (TBS) frame. Each skew estimate is related to an estimated position of a magnetic tape read head in relation to a magnetic tape medium. In another embodiment, a system includes a hardware processor and logic integrated with and/or executable by the hardware processor. The logic is configured to cause the hardware processor to compute an initial skew estimate based on longitudinal position (LPOS) sync-pattern detection flags detected using servo channels which process at least two readback signals, with the proviso that the LPOS sync-pattern detection flags are only used to compute the initial skew estimate. The logic is also configured to compute more than one skew estimate within each TBS frame thereafter, each skew estimate being related to an estimated position of a magnetic tape read head in relation to a magnetic tape medium.
    Type: Application
    Filed: November 5, 2015
    Publication date: May 11, 2017
    Inventors: Giovanni Cherubini, Simeon Furrer, Robert A. Hutchins, Mark A. Lantz
  • Publication number: 20170126254
    Abstract: In one embodiment, a method includes writing data to a storage medium, via a write channel, by applying a partial reverse concatenated modulation code to the data prior to storing encoded data to the storage medium. The applying the partial reverse concatenated modulation code to the data includes application of a C2 encoding scheme to the data to produce C2-encoded data prior to application of one or more modulation encoding schemes to the C2-encoded data to produce modulated data, followed by application of a C1 encoding scheme to the modulated data subsequent to the application of the one or more modulation encoding schemes to produce the encoded data.
    Type: Application
    Filed: January 12, 2017
    Publication date: May 4, 2017
    Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
  • Publication number: 20170117014
    Abstract: In one embodiment, a system includes a data processing unit configured to read encoded data from a magnetic tape medium. The data processing unit is also configured to decode a plurality of codeword interleaves (CWIs) from the encoded data, each CWI being a row in a sub data set logically organized into a two-dimensional array. The array includes a predetermined number of rows and columns of predetermined lengths. The data processing unit is also configured to determine an address for a first-written CWI without successfully decoding a corresponding codeword interleave designation (CWID) from the encoded data, each CWID specifying an address for a corresponding CWI. Also, each CWID is calculated as a function of a logical track number and a CWI set number.
    Type: Application
    Filed: October 26, 2015
    Publication date: April 27, 2017
    Inventors: Roy D. Cideciyan, Simeon Furrer, Robert A. Hutchins, Mark A. Lantz, Keisuke Tanaka
  • Publication number: 20170117015
    Abstract: In one general embodiment, a method includes determining a sampling interval for an interpolator using at least one parameter. The method further includes applying the sampling interval to the interpolator in response to determining the sampling interval. In another general embodiment, an apparatus includes an interpolator and a controller. The controller is configured to determine a sampling interval for the interpolator using at least one parameter. The controller is also configured to apply the sampling interval to the interpolator in response to determining the sampling interval.
    Type: Application
    Filed: January 5, 2017
    Publication date: April 27, 2017
    Inventors: Giovanni Cherubini, Simeon Furrer, Robert A. Hutchins, Jens Jelitto
  • Patent number: 9633681
    Abstract: In one embodiment, a method includes computing more than one skew estimate within each timing-based servo (TBS) frame. Each skew estimate is related to an estimated position of a magnetic tape read head in relation to a magnetic tape medium. In another embodiment, a system includes a hardware processor and logic integrated with and/or executable by the hardware processor. The logic is configured to cause the hardware processor to compute an initial skew estimate based on longitudinal position (LPOS) sync-pattern detection flags detected using servo channels which process at least two readback signals, with the proviso that the LPOS sync-pattern detection flags are only used to compute the initial skew estimate. The logic is also configured to compute more than one skew estimate within each TBS frame thereafter, each skew estimate being related to an estimated position of a magnetic tape read head in relation to a magnetic tape medium.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Giovanni Cherubini, Simeon Furrer, Robert A. Hutchins, Mark A. Lantz
  • Patent number: 9633690
    Abstract: In one embodiment, a system for cycle-slip resilient iterative read channel operation includes a processor and logic integrated with and/or executable by the processor. The logic is configured to, in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced, execute cycle-slip detection on signal samples to detect one or more cycle-slip events. Also, the logic is configured to selectively alter a timing estimate driving a phase-locked loop (PLL) during any time interval determined to experience a cycle slip in a first pass as indicated by one or more cycle-slip pointers. Additionally, the logic is configured to generate a set of decisions provided by a detector and generate a set of decisions provided by a decoder. Moreover, the logic is configured to output decoding information relating to the signal samples in response to a decoding algorithm producing a valid codeword.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
  • Patent number: 9633687
    Abstract: An apparatus includes a loop filter that receives a plurality of input signals. Each of the input signals is based on a different timing error detector output signal. The apparatus also includes a plurality of read channels, a plurality of interpolation filters, and an array of transducers. Each of the interpolation filters is in communication with a corresponding one of the read channels. Each of the transducers is in communication with a corresponding one of the read channels. The loop filter processes the plurality of input signals, and outputs a different total phase signal for each received input signal. Each of the interpolation filters samples the corresponding read channel based on one of the total phase signals output by the loop filter. The loop filter processes the plurality of input signals by calculating a phase estimate of the samples, and a skew estimate of the samples, relative to written data.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Simeon Furrer, Robert A. Hutchins, Jens Jelitto, Mark A. Lantz
  • Patent number: 9564925
    Abstract: In one embodiment, a method includes loading first data into a first buffer of an interposer during a first time period and loading second data into a second buffer of the interposer and performing a first decoding operation on the first data using a first decoder during a second time period. The method includes loading third data into a third buffer of the interposer, performing the first decoding operation on the second data using the first decoder, and performing a second decoding operation on the first data using a second decoder during a third time period. Moreover, the method includes loading fourth data into a fourth buffer of the interposer, performing the first decoding operation on the third data using the first decoder, and performing the second decoding operation on the second data during a fourth time period. The first and second decoding operations are C1 or C2 decoding operations.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Bentley, Simeon Furrer, Robert A. Hutchins, Scott J. Schaffer, Keisuke Tanaka
  • Patent number: 9564168
    Abstract: In one general embodiment, a method includes determining a sampling interval for an interpolator using at least one of: predefined data stored in memory, and a standard deviation of a position error signal. The method further includes applying the sampling interval to the interpolator in response to determining the sampling interval. In another general embodiment, an apparatus includes an interpolator and a controller. The controller is configured to determine a sampling interval for the interpolator using at least one of: predefined data stored in memory, and a standard deviation of a position error signal. The controller is also configured to apply the sampling interval to the interpolator in response to determining the sampling interval.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: February 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Giovanni Cherubini, Simeon Furrer, Robert A. Hutchins, Jens Jelitto
  • Patent number: 9557385
    Abstract: A computer program product is provided for performing symbol timing recovery in a parallel recording channel system. The computer program product comprises a computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a processor to cause the processor to receive a plurality of timing-error estimates for a plurality of read channels. Each of the timing-error estimates corresponds to one of the read channels. Also, the program instructions are executable by the processor to cause the processor to calculate a common phase based on the plurality of timing-error estimates. Moreover, the program instructions are executable by the processor to cause the processor to calculate a skew of a transducer array based on the plurality of timing-error estimates, and to calculate a different total phase estimate for each read channel based on the calculated common phase and the calculated skew of the transducer array.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: January 31, 2017
    Assignee: International Business Machines Corporation
    Inventors: Simeon Furrer, Robert A. Hutchins, Jens Jelitto, Mark A. Lantz
  • Patent number: 9558782
    Abstract: In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1 - and C2-encoded data sets to data tracks.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: January 31, 2017
    Assignee: International Business Machines Corporation
    Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
  • Patent number: 9552841
    Abstract: In one general embodiment, a magnetic recording tape includes a plurality of servo tracks, each servo track comprising a series of magnetically defined bars, wherein an average stripe width of the bars is between about 1.0 micron and about 2.2 microns, where an average servo frame length of groups of the bars comprising a servo frame is between about 120 microns and about 180 microns. In another general embodiment, a system includes a head having at least one servo reader and an array of data transducers of a type selected from a group consisting of readers and writers; and a controller operative to selectively enable every other transducer of a particular type in the array in a first mode of operation, and operative to selectively enable every transducer of the particular type in the array in a second mode of operation.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: January 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Nhan X. Bui, Giovanni Cherubini, Evangelos S. Eleftheriou, Reed A. Hancock, Robert A. Hutchins
  • Patent number: 9548760
    Abstract: In one embodiment, a computer program product for providing header protection in magnetic tape recording includes a computer readable storage medium having program instructions embodied therewith, the program instructions readable by a processor to cause the processor to: calculate or obtain, by the processor, codeword interleave designation (CWID) parity for all CWIDs in a codeword interleave (CWI) set header, the CWID parity including error correction coding (ECC) parity, and store, by the processor, the CWID parity to a magnetic tape in one or more fields which are repeated for each CWI header in the CWI set header without using reserved bits in the CWI set header to store the CWID parity. Other systems and methods for providing header protection in magnetic tape recording are described in more embodiments.
    Type: Grant
    Filed: May 30, 2015
    Date of Patent: January 17, 2017
    Assignee: International Business Machines Corporation
    Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Keisuke Tanaka
  • Patent number: 9542265
    Abstract: A method for decoding a headerized sub data set (SDS) according to one embodiment includes decoding a header from a headerized SDS to obtain a SDS. C1 and C2 decoding are performed on the SDS in a number of iterations based on a number of interleaves in each row of the SDS. A number of columns of the SDS are overwritten with successfully decoded C2 codewords. A number of rows of the SDS are overwritten with successfully decoded C1 codewords. A number of C1 and/or C2 codewords of the SDS are erased. Remaining rows and/or columns of the SDS are maintained as uncorrected. The SDS is output when all rows of the SDS include only C1 codewords and all columns of the SDS include only C2 codewords.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: January 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Keisuke Tanaka
  • Patent number: 9542973
    Abstract: In one embodiment, a data storage system includes a head configured to produce a signal representing data stored on a storage medium, a bank of noise whitening filters configured to apply one or more noise whitening filters to the signal to produce a filtered signal, and a data-dependent noise mean calculator configured to estimate a data-dependent noise mean from the filtered signal. The system also includes a branch metric calculator configured to perform one or more branch metric calculations on the filtered signal to produce one or more branch metrics, the one or more branch metric calculations accounting for the data-dependent noise mean. Moreover, the system includes an adaptive data-dependent noise-predictive maximum likelihood (D3-NPML) detector configured to generate an output stream from the one or more branch metric calculations.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: January 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Simeon Furrer, Robert A. Hutchins, Mark A. Lantz
  • Publication number: 20170003510
    Abstract: A planar line generator including a first planar surface extending in a first direction, a second planar surface facing the first planar surface, and a beam splitter in front of the second planar surface, the beam splitter configured to output, from light incident thereon, an undeflected beam, a first beam deflected to a first side of the undeflected beam along the first direction, and a second beam deflected to a second side of the undeflected beam along the first direction, wherein the second planar surface includes a line diffuser configured to receive the undeflected beam, and first and second diffusers having a design different from the line diffuser, the first and second diffusers being configured to receive the first and second beams, respectively.
    Type: Application
    Filed: March 9, 2015
    Publication date: January 5, 2017
    Inventors: Robert HUTCHINS, Alan D. KATHMAN
  • Patent number: 9524741
    Abstract: In one embodiment, a tape drive includes a controller including a processor and logic integrated with and/or executable by the processor. The logic is configured to obtain at least two periodic waveform components of a high density (HD) servo signal read by a servo reader from a HD pattern written on a servo band of a magnetic tape medium. The logic is also configured to filter the HD servo signal using a number of digital filters that are configurable to detect waveform components simultaneously read from the magnetic tape medium, each digital filter being configured to match waveform component parameters and tape velocity. Moreover, the logic is configured to compute a position error signal (PES) based on the filtering of the HD servo signal comprising the waveform components.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: December 20, 2016
    Assignee: International Business Machines Corporation
    Inventors: Giovanni Cherubini, Simeon Furrer, Robert A. Hutchins, Jens Jelitto
  • Publication number: 20160365110
    Abstract: An apparatus includes a loop filter that receives a plurality of input signals. Each of the input signals is based on a different timing error detector output signal. The apparatus also includes a plurality of read channels, a plurality of interpolation filters, and an array of transducers. Each of the interpolation filters is in communication with a corresponding one of the read channels. Each of the transducers is in communication with a corresponding one of the read channels. The loop filter processes the plurality of input signals, and outputs a different total phase signal for each received input signal. Each of the interpolation filters samples the corresponding read channel based on one of the total phase signals output by the loop filter. The loop filter processes the plurality of input signals by calculating a phase estimate of the samples, and a skew estimate of the samples, relative to written data.
    Type: Application
    Filed: December 30, 2015
    Publication date: December 15, 2016
    Inventors: Simeon Furrer, Robert A. Hutchins, Jens Jelitto, Mark A. Lantz