Patents by Inventor Robert A. Rita

Robert A. Rita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240108114
    Abstract: An attachment including a casing having an air inlet for receiving an airflow from a hair styling apparatus, a hair engaging member, supported by the casing, and adapted to move relative to the casing between a first position and a second position under the action of an over-centre mechanism. First and second airflow outlets are formed between the casing and the hair engaging member when the hair engaging member is in the first and second position, respectively.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 4, 2024
    Applicant: Dyson Technology Limited
    Inventors: Annmarie Rita NICOLSON, Emma Victoria CARSON, Robert Mark Brett COULTON, Stephen Benjamin COURTNEY
  • Patent number: 7608295
    Abstract: A method to repair ceramic substrates is disclosed using a novel polyimide polymer which has high thermal stability, resistance to fluxes and flux residue cleaning solvents and processes, good mechanical properties, good adhesion to all contacting surfaces with low moisture uptake and good flow properties suitable for repairing chipped ceramic, filling deep trench or vias and writing passivation lines with automated process The polyimide polymer is made by reacting aromatic dianhydride and aromatic diamine monomers with a stoichiometric offset and end capping the resulting polymer when the reaction is completed. The preferred polyimide is made using a molar excess of diamine which is end-capped using an anhydride.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: October 27, 2009
    Assignee: International Business Machines Corporation
    Inventors: Krishna G Sachdev, Michael Berger, Gregg Monjeau, Robert A. Rita, Kathleen M Wiley
  • Publication number: 20080245467
    Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 3-6 ppm/° C., a dielectric constant that is less than 5 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 45-58 wt %, Al2O3 in a range of 10-18 wt % and MgO in a range of 10-25 wt %. A method of making the glass-ceramic is also provided. Further, an electronic package is also provided, including a base member and a glass-ceramic substrate bonded to the base member.
    Type: Application
    Filed: June 10, 2008
    Publication date: October 9, 2008
    Applicant: Delaware Capital Formation, Inc.
    Inventor: Robert A. RITA
  • Patent number: 7387838
    Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 3-6 ppm/° C., a dielectric constant that is less than 5 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 45-58 wt %, Al2O3 in a range of 10-18 wt % and MgO in a range of 10-25 wt %. A method of making the glass-ceramic is also provided. Further, an electronic package is also provided, including a base member and a glass-ceramic substrate bonded to the base member.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: June 17, 2008
    Assignee: Delaware Capital Formation, Inc.
    Inventor: Robert A. Rita
  • Patent number: 7294909
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: November 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jon A. Casey, James G. Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David C. Long, Lori A. Maiorino, Arthur G. Merryman, Glenn A. Pomerantz, Robert A. Rita, Krystyna W. Semkow, Patrick E. Spencer, Brian R. Sundlof, Richard P. Surprenant, Donald R. Wall, Thomas A. Wassick, Kathleen M. Wiley
  • Publication number: 20070154631
    Abstract: A method to repair ceramic substrates is disclosed using a novel polyimide polymer which has high thermal stability, resistance to fluxes and flux residue cleaning solvents and processes, good mechanical properties, good adhesion to all contacting surfaces with low moisture uptake and good flow properties suitable for repairing chipped ceramic, filling deep trench or vias and writing passivation lines with automated process The polyimide polymer is made by reacting aromatic dianhydride and aromatic diamine monomers with a stoichiometric offset and end capping the resulting polymer when the reaction is completed. The preferred polyimide is made using a molar excess of diamine which is end-capped using an anhydride.
    Type: Application
    Filed: March 12, 2007
    Publication date: July 5, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Krishna Sachdev, Michael Berger, Gregg Monjeau, Robert Rita, Kathleen Wiley
  • Patent number: 7186461
    Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 4.0 to 8.5 ppm/° C., a dielectric constant in a range of 5–7 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 40–55 wt %, Al2O3 in a range of 7–22 wt %, MgO in a range of 6 to less than 26 wt %, and at least one of BaO in an amount up to 35 wt %, SrO in an amount up to 37 wt % and ZnO in an amount up to 17 wt %. An electronic package is also provided, including one of a metal and sintered ceramic base member and a glass-ceramic substrate bonded to the base member.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: March 6, 2007
    Assignee: Delaware Capital Formation, Inc.
    Inventor: Robert A. Rita
  • Publication number: 20050266252
    Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 3-6 ppm/° C., a dielectric constant that is less than 5 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 45-58 wt %, Al2O3 in a range of 10-18 wt % and MgO in a range of 10-25 wt %. A method of making the glass-ceramic is also provided. Further, an electronic package is also provided, including a base member and a glass-ceramic substrate bonded to the base member.
    Type: Application
    Filed: March 18, 2005
    Publication date: December 1, 2005
    Applicant: Delaware Capital Formation, Inc.
    Inventor: Robert Rita
  • Publication number: 20050266251
    Abstract: A glass-ceramic is provided having a thermal expansion coefficient in a range of 4.0 to 8.5 ppm/° C., a dielectric constant in a range of 5-7 and a Quality factor Q of at least 400. The glass-ceramic consists essentially of SiO2 in a range of 40-55 wt %, Al2O3 in a range of 7-22 wt %, MgO in a range of 6 to less than 26 wt %, and at least one of BaO in an amount up to 35 wt %, SrO in an amount up to 37 wt % and ZnO in an amount up to 17 wt %. An electronic package is also provided, including one of a metal and sintered ceramic base member and a glass-ceramic substrate bonded to the base member.
    Type: Application
    Filed: March 18, 2005
    Publication date: December 1, 2005
    Applicant: Delaware Capital Formation, Inc.
    Inventor: Robert Rita
  • Publication number: 20050176255
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Application
    Filed: April 5, 2005
    Publication date: August 11, 2005
    Inventors: Jon Casey, James Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David Long, Lori Maiorino, Arthur Merryman, Glenn Pomerantz, Robert Rita, Krystyna Semkow, Patrick Spencer, Brian Sundlof, Richard Surprenant, Donald Wall, Thomas Wassick, Kathleen Wiley
  • Patent number: 6916670
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: July 12, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jon A. Casey, James G. Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David C. Long, Lori A. Maiorino, Arthur G. Merryman, Glenn A. Pomerantz, Robert A. Rita, Krystyna W. Semkow, Patrick E. Spencer, Brian R. Sundlof, Richard P. Surprenant, Donald R. Wall, Thomas A. Wassick, Kathleen M. Wiley
  • Patent number: 6823585
    Abstract: A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Mark J. LaPlante, Jon A. Casey, Thomas A. Wassick, David C. Long, Krystyna W. Semkow, Patrick E. Spencer, Robert A. Rita, Richard F. Indyk, Kathleen M. Wiley, Brian R. Sundlof, James Balz, Lori A. Maiorino, Donald R. Wall, Glenn A. Pomerantz
  • Publication number: 20040187303
    Abstract: A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark J. LaPlante, Jon A. Casey, Thomas A. Wassick, David C. Long, Krystyna W. Semkow, Patrick E. Spencer, Robert A. Rita, Richard F. Indyk, Kathleen M. Wiley, Brian R. Sundlof, James Balz, Lori A. Maiorino, Donald R. Wall, Glenn A. Pomerantz
  • Publication number: 20040148765
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Application
    Filed: February 4, 2003
    Publication date: August 5, 2004
    Applicant: International Business Machines Corporation
    Inventors: Jon A. Casey, James G. Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David C. Long, Lori A. Maiorino, Arthur G. Merryman, Glenn A. Pomerantz, Robert A. Rita, Krystyna W. Semkow, Patrick E. Spencer, Brian R. Sundlof, Richard P. Surprenant, Donald R. Wall, Thomas A. Wassick, Kathleen M. Wiley
  • Publication number: 20040132900
    Abstract: A method to repair ceramic substrates is disclosed using a novel polyimide polymer which has high thermal stability, resistance to fluxes and flux residue cleaning solvents and processes, good mechanical properties, good adhesion to all contacting surfaces with low moisture uptake and good flow properties suitable for repairing chipped ceramic, filling deep trench or vias and writing passivation lines with automated process The polyimide polymer is made by reacting aromatic dianhydride and aromatic diamine monomers with a stoichiometric offset and end capping the resulting polymer when the reaction is completed. The preferred polyimide is made using a molar excess of diamine which is end-capped using an anhydride.
    Type: Application
    Filed: January 8, 2003
    Publication date: July 8, 2004
    Applicant: International Business Machines Corporation
    Inventors: Krishna G. Sachdev, Michael Berger, Gregg Monjeau, Robert A. Rita, Kathleen M. Wiley
  • Patent number: 6713686
    Abstract: A multi chip module substrate arranged with repair vias and repair lines extending between repair vias of the chip sites of the module by which repairs can be effected to overcome defects in the module circuits and a method for effecting the repairs of defects in the circuits of this module. A defect can occur in any one of a first signal via, a second signal via, and a circuit line extending between and intended to electrically connect the first signal via and the second signal via. After a defective circuit is identified, the signal vias of the circuit are isolated. Then, the first signal via of the defective circuit is electrically connected to that repair via of the chip site having the first signal via that is connected to that repair via of the chip site having the second signal via and the second signal via of the defective circuit is electrically connected to that repair via of the chip site having the second signal via that is connected to that repair via of the chip site having the first signal via.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: March 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Wiren D. Becker, Dinesh Gupta, Sudipta K. Ray, Robert A. Rita, Herbert I. Stoller, Kathleen M. Wiley
  • Publication number: 20030136581
    Abstract: A multi chip module substrate arranged with repair vias and repair lines extending between repair vias of the chip sites of the module by which repairs can be effected to overcome defects in the module circuits and a method for effecting the repairs of defects in the circuits of this module. A defect can occur in any one of a first signal via, a second signal via, and a circuit line extending between and intended to electrically connect the first signal via and the second signal via. After a defective circuit is identified, the signal vias of the circuit are isolated. Then, the first signal via of the defective circuit is electrically connected to that repair via of the chip site having the first signal via that is connected to that repair via of the chip site having the second signal via and the second signal via of the defective circuit is electrically connected to that repair via of the chip site having the second signal via that is connected to that repair via of the chip site having the first signal via.
    Type: Application
    Filed: January 18, 2002
    Publication date: July 24, 2003
    Applicant: International Business Machines Corporation
    Inventors: Wiren D. Becker, Dinesh Gupta, Sudipta K. Ray, Robert A. Rita, Herbert I. Stoller, Kathleen M. Wiley
  • Patent number: 6475555
    Abstract: A process wherein a low viscosity, metal-containing paste is screened onto a ceramic greensheet and then sets up to increase its viscosity. In one method, the low viscosity is caused by excess solvent which is then blotted or otherwise removed so that the viscosity of the paste is increased. In an alternative method, the low viscosity paste contains a cross-linking agent which causes the paste to increase its viscosity after screening.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: November 5, 2002
    Assignee: International Business Machines Corporation
    Inventors: Jon A. Casey, Dinesh Gupta, Lester Wynn Herron, John U. Knickerbocker, David C. Long, Jawahar P. Nayak, Brenda L. Peterson, Robert A. Rita
  • Patent number: 6461493
    Abstract: A process for fabricating a structure using a metal carrier and forming a double capacitor structure. The process comprises forming a first via hole through the metal carrier, forming a dielectric layer around the metal carrier and inside the first via hole, forming a second via hole through the dielectric layer and the metal carrier, and filling at least one of the via holes with conductive material. In one preferred embodiment, the process further comprises forming a third via hole through the metal carrier before the forming of a dielectric layer, wherein the dielectric layer is formed around the metal carrier, inside the first via hole, and inside the third via hole. The first via hole, the second via hole, and the third via hole are all filled with a conductive material. In one preferred embodiment, the dielectric layer comprises a top surface opposed to a bottom surface, and electrodes are formed on at least one of the top surface and the bottom surface of the dielectric layer.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: October 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Mukta S. Farooq, Shaji Farooq, John U. Knickerbocker, Robert A. Rita, Srinivasa N. Reddy
  • Patent number: 6436332
    Abstract: The dielectric constant of low loss tangent glass-ceramic compositions, such as cordierite-based glass ceramics, is modified over a range by selective addition of high dielectric constant ceramics, such as titanates, tantalates and carbides and metals, such as copper. The low loss tangent is retained or improved over a range of frequencies, and the low CTE of the glass-ceramic is maintained. BaTiO3, SrTiO3 and Ta2O5 produce the most effective results.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: August 20, 2002
    Assignee: International Business Machines Corporation
    Inventors: Benjamin V. Fasano, Robert A. Rita