Patents by Inventor Robert A. Shearer

Robert A. Shearer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180285600
    Abstract: Briefly stated, the disclosed technology is generally directed to integrated circuit (IC) technology for an IoT processor. In one example, multiple components may be tightly or otherwise integrated onto a single die, e.g., a single monolithic integrated circuit. In one basic example, the components may include a security processing unit and a radio. The components may also include one or more microprocessors (e.g., a processor capable of executing a high-level operating system), microcontrollers, secure memories, encryption components, peripheral interfaces, and/or the like. The security processing unit and/or the configuration of the components may enable, facilitate, or otherwise provide for security features such as tamper resistance, data security, and/or the like.
    Type: Application
    Filed: June 21, 2017
    Publication date: October 4, 2018
    Inventors: Galen C. HUNT, Robert SHEARER, George T. LETEY, Douglas L. STILES, Edmund B. NIGHTINGALE
  • Publication number: 20180228081
    Abstract: A crop harvesting header having a frame mounted on a propulsion vehicle has a cutter bar carrying a sickle knife and a draper transport. The draper is guided at its front edge by a longitudinally extending rail mounted on the frame for movement therewith. The cutter bar is mounted on the frame at spaced positions by spring blades attached to a fixed beam at the rear which allow up and down flexing movement of the cutter bar relative to the draper engagement member. At the center discharge the cutter bar is carried on shorter blades which are carried on a beam in front of the front draper roller. The small amount of flexing of the cutter bar combines with a balanced three piece header frame to provide effective ground following.
    Type: Application
    Filed: November 20, 2017
    Publication date: August 16, 2018
    Inventor: Bruce Robert Shearer
  • Publication number: 20180153102
    Abstract: A header is supported by a pair of hydraulic float cylinders, where a float pressure to the cylinders is directly controlled by an electronic control supplying a variable control signal to a PPRR valve arrangement to maintain the float pressure at a predetermined value. At the set pressure a predetermined lifting force is provided to the header. A position sensor is used to generate an indication of movement and/or acceleration and/or velocity. The electronic control is arranged, in response to changes in the sensor signal, to temporarily change the control signal to vary the lifting force and thus change the dynamic response of the hydraulic float cylinder. A lift force greater than that required to lift the header can be provided by a lift cylinder and can be opposed in a controlled manner to apply a controlled downforce by the back of the same cylinder or by a separate component.
    Type: Application
    Filed: December 11, 2017
    Publication date: June 7, 2018
    Inventors: James Thomas Dunn, Graham Michael Leverick, Russell George Lyons, Bruce Robert Shearer, Kyle Edward Boch
  • Publication number: 20180153101
    Abstract: A header is supported by a pair of hydraulic float cylinders, where a float pressure to the cylinders is directly controlled by an electronic control supplying a variable control signal to a PPRR valve arrangement to maintain the float pressure at a predetermined value. At the set pressure a predetermined lifting force is provided to the header. A position sensor is used to generate an indication of movement and/or acceleration and/or velocity. The electronic control is arranged, in response to changes in the sensor signal, to temporarily change the control signal to vary the lifting force and thus change the dynamic response of the hydraulic float cylinder. A lift force greater than that required to lift the header can be provided by a lift cylinder and can be opposed in a controlled manner to apply a controlled downforce by the back of the same cylinder or by a separate component.
    Type: Application
    Filed: December 11, 2017
    Publication date: June 7, 2018
    Inventors: James Thomas Dunn, Graham Michael Leverick, Russell George Lyons, Bruce Robert Shearer, Kyle Edward Boch
  • Publication number: 20180139898
    Abstract: A crop harvesting header having a frame mounted on a propulsion vehicle has a cutter bar carrying a sickle knife and a draper transport. The draper is guided at its front edge by a longitudinally extending rail mounted on the frame for movement therewith. The cutter bar is mounted on the frame at spaced positions by spring blades attached to a fixed beam at the rear which allow up and down flexing movement of the cutter bar relative to the draper engagement member. At the center discharge the cutter bar is carried on shorter blades which are carried on a beam in front of the front draper roller. The small amount of flexing of the cutter bar combines with a balanced three piece header frame to provide effective ground following.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 24, 2018
    Inventor: Bruce Robert Shearer
  • Publication number: 20180139899
    Abstract: A crop harvesting header having a frame mounted on a propulsion vehicle has a cutter bar carrying a sickle knife and a draper transport. The draper is guided at its front edge by a longitudinally extending rail mounted on the frame for movement therewith. The cutter bar is mounted on the frame at spaced positions by spring blades attached to a fixed beam at the rear which allow up and down flexing movement of the cutter bar relative to the draper engagement member. At the center discharge the cutter bar is carried on shorter blades which are carried on a beam in front of the front draper roller. The small amount of flexing of the cutter bar combines with a balanced three piece header frame to provide effective ground following.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 24, 2018
    Inventor: Bruce Robert Shearer
  • Patent number: 9968033
    Abstract: In a crop harvesting machine there is provided a pair of hydraulic float cylinders for a header relative to a vehicle, where a float pressure to the cylinders is directly controlled by an electronic control supplying a variable control signal to a PPRR valve arrangement to maintain the float pressure at a predetermined value. At the set pressure a predetermined lifting force is provided to the header. A position sensor is used to generate an indication of movement and/or acceleration. The electronic control is arranged, in response to changes in the sensor signal, to temporarily change the control signal to vary the lifting force and thus change the dynamic response of the hydraulic float cylinder. In order to reduce static friction so that the system can react quickly, an arrangement is provided for causing relative reciprocating movement in an alternating wave pattern between the piston and cylinder.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: May 15, 2018
    Assignee: MacDon Industries Ltd.
    Inventors: James Thomas Dunn, Graham Michael Leverick, Russell George Lyons, Bruce Robert Shearer
  • Patent number: 9927862
    Abstract: A digital signal processor includes a variable precision hardware pipeline that provides a maximum level of precision using a first plurality of bits for a mathematical representation. The pipeline stages include data registers to store the first plurality of bits. A precision select module selects a level of precision for processing a block of instructions and sets a precision control register. Logic circuitry utilizes the precision control register to gate the clock signal for one or more of the first plurality of bits to reduce the precision of the hardware pipeline. The logic circuitry disables the clock signal for the data latches in the pipeline corresponding to bits to be disabled to reduce the precision. By disabling the clock signal for the data registers, the amount of power consumed by the pipeline can be reduced.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: March 27, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Robert Shearer, Matthew Tubbs, Ryan Haraden
  • Patent number: 9864712
    Abstract: A method for communicating data in a processing architecture comprising a plurality of interconnected IP blocks. Transmitting IP blocks may transmit messages to a shared receive queue for a first IP block. Receipt of the messages at the shared receive queue may be controlled based on receive credits allocated to each transmitting IP block. The allocation of receive credits for each transmitting IP block may dynamically managed such that the allocation of receive credits may be dynamically adjusted for each transmitting IP block based at least in part on message traffic associated with each transmitting IP block and/or a priority associated with each transmitting IP block.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: January 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey D. Brown, Robert A. Shearer
  • Publication number: 20170359955
    Abstract: In a crop harvesting machine there is provided a pair of hydraulic float cylinders for a header relative to a vehicle, where a float pressure to the cylinders is directly controlled by an electronic control supplying a variable control signal to a PPRR valve arrangement to maintain the float pressure at a predetermined value. At the set pressure a predetermined lifting force is provided to the header. A position sensor is used to generate an indication of movement and/or acceleration. The electronic control is arranged, in response to changes in the sensor signal, to temporarily change the control signal to vary the lifting force and thus change the dynamic response of the hydraulic float cylinder. In order to reduce static friction so that the system can react quickly, an arrangement is provided for causing relative reciprocating movement in an alternating wave pattern between the piston and cylinder.
    Type: Application
    Filed: August 15, 2017
    Publication date: December 21, 2017
    Inventors: James Thomas Dunn, Graham Michael Leverick, Russell George Lyons, Bruce Robert Shearer
  • Publication number: 20170359954
    Abstract: In a crop harvesting machine there is provided a pair of hydraulic float cylinders for a header relative to a vehicle, where a float pressure to the cylinders is directly controlled by an electronic control supplying a variable control signal to a PPRR valve arrangement to maintain the float pressure at a predetermined value. At the set pressure a predetermined lifting force is provided to the header. A position sensor is used to generate an indication of movement and/or acceleration. The electronic control is arranged, in response to changes in the sensor signal, to temporarily change the control signal to vary the lifting force and thus change the dynamic response of the hydraulic float cylinder. In order to reduce static friction so that the system can react quickly, an arrangement is provided for causing relative reciprocating movement in an alternating wave pattern between the piston and cylinder.
    Type: Application
    Filed: June 21, 2016
    Publication date: December 21, 2017
    Inventors: James Thomas Dunn, Graham Michael Leverick, Russell George Lyons, Bruce Robert Shearer
  • Patent number: 9710274
    Abstract: Various methods tightly couple together decode logic associated with multiple types of execution units and having varying priorities to enable instructions that are decoded as valid instructions for multiple types of execution units to be forwarded to a highest priority type of execution unit among the multiple types of execution units. Among other benefits, when an auxiliary execution unit is coupled to a general purpose processing core with the decode logic for the auxiliary execution unit tightly coupled with the decode logic for the general purpose processing core, the auxiliary execution unit may be used to effectively overlay new functionality for an existing instruction that is normally executed by the general purpose processing core, e.g., to patch a design flaw in the general purpose processing core or to provide improved performance for specialized applications.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: July 18, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Patent number: 9678885
    Abstract: A method and circuit arrangement selectively perform regular expression matching in connection with accessing data with a processing unit based upon one or more regular expression matching-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A regular expression matching-related attribute in such a data structure may be used to control whether data being communicated between the processing unit and a communications bus is routed through an expression engine integrated with the processing unit such that regular expression matching may be performed in association with the data communication.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: June 13, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Patent number: 9652239
    Abstract: A method decodes instructions based in part on one or more decode-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a decode of an instruction stored in a page of memory, such that one or more attributes associated with the page in the data structure may be used to control how that instruction is decoded.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: May 16, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Patent number: 9652238
    Abstract: A circuit arrangement decodes instructions based in part on one or more decode-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a decode of an instruction stored in a page of memory, such that one or more attributes associated with the page in the data structure may be used to control how that instruction is decoded.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: May 16, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Publication number: 20170127609
    Abstract: A sickle cutting system is mounted on a header for forward travel over ground having a standing crop thereon and includes a cutter bar with a plurality of knife guards and at least one sickle bar with a drive system for driving the sickle bar through repeated cycles of reciprocating movement from start-up of the system through to a shut-down. The drive system includes an arrangement to halt the sickle bar on shut-down at a predetermined position of the knife blades relative to the knife guards and preferably the position where the blades lie intermediate two knife guards. The system can be halted by either a physical stop member at the required position or by detecting the position of the sickle bar during operation and causing it to halt the required position. The detection can be carried out by counting pulses generated by markers on a rotary member of the drive system.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 11, 2017
    Inventors: James Thomas Dunn, Bruce Robert Shearer
  • Patent number: 9632786
    Abstract: A method and circuit arrangement selectively repurpose bits from a primary opcode portion of an instruction for use in decoding one or more operands for the instruction. Decode logic of a processor, for example, may be placed in a predetermined mode that decodes a primary opcode for an instruction that is different from that specified in the primary opcode portion of the instruction, and then utilize one or more bits in the primary opcode portion to decode one or more operands for the instruction. By doing so, additional space is freed up in the instruction to support a larger register file and/or additional instruction types, e.g., as specified by a secondary or extended opcode.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Patent number: 9632779
    Abstract: A method and circuit arrangement for selectively predicating instructions in an instruction stream based upon a predication filter criteria defined by a predication filter, which describes types or patterns of instructions that should be predicated. Predication logic compares a respective instruction of an instruction stream to predication filter criteria to determine whether the respective instruction matches the predication filter criteria, and the respective instruction is selectively predicated based on whether the respective instruction matches the predication filter criteria.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Patent number: 9619234
    Abstract: A circuit arrangement and program product selectively predicate instructions in an instruction stream by determining a first register address from an instruction, determining a second register address based on a value stored at the first register address, and determining whether to predicate the instruction based at least in part on a value stored at the second register address. Predication logic may analyze the instruction to determine the first register address, analyze a register corresponding to the first register address to determine the second register address, and communicate a predication signal to an execution unit based at least in part on the value stored at the second register address.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
  • Patent number: 9606841
    Abstract: A method for scheduling processes of a workload on a plurality of hardware threads configured in a plurality of processing elements of a multithreading parallel computing system for processing thereby. Process dimensions for each process are determined based on processing attributes associated with each process, and a place and route algorithm is utilized to map the processes to a processor space representative of the processing resources of the computing system based at least in part on the process dimensions to thereby distribute the processes of the workload.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: March 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jamie R. Kuesel, Mark G. Kupferschmidt, Paul E. Schardt, Robert A. Shearer