Patents by Inventor Robert B. Welstand

Robert B. Welstand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240388285
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Application
    Filed: April 19, 2024
    Publication date: November 21, 2024
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener
  • Publication number: 20240266441
    Abstract: A method and apparatus are disclosed for use in improving gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit includes a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge. Determinations are made of effects of an uncontrolled accumulated charge and a controlled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the determinations, and the circuit is operated using techniques for ACC operatively coupled to the SOI MOSFET.
    Type: Application
    Filed: February 12, 2024
    Publication date: August 8, 2024
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae-Youn Kim
  • Patent number: 11967948
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: April 23, 2024
    Assignee: pSemi Corporation
    Inventors: Christopher N. Brindle, Michael A Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener
  • Patent number: 11901459
    Abstract: A method and apparatus are disclosed for use in improving gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit includes a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: February 13, 2024
    Assignee: pSemi Corporation
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae-Youn Kim
  • Publication number: 20220404549
    Abstract: A waveguide coupler includes a coupling section which evanescently couples an optical signal, received from an input waveguide, with an absorbing waveguide. Structurally, the coupling section is an elongated waveguide with one end butt-coupled to the input waveguide. Further, the coupling section defines an engagement side edge which is positioned at a predetermined distance from a dimensionally compatible side surface area of the absorbing waveguide. In this combination, evanescence from the optical signal is directed laterally from the coupling section, through the engagement side edge of the coupling section, and through an assisting component, to the absorbing waveguide for use with a photodetector.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 22, 2022
    Inventors: Robert B. Welstand, Chen-Kuo Sun, Grace A. Sun
  • Publication number: 20220311432
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FIT performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 29, 2022
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener
  • Patent number: 11362652
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: June 14, 2022
    Assignee: pSemi Corporation
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener
  • Publication number: 20220181497
    Abstract: A method and apparatus are disclosed for use in improving gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit includes a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 9, 2022
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae-Youn Kim
  • Publication number: 20220094876
    Abstract: Circuitry for an optical receiver includes a photodiode for converting an optical signal into a photocurrent having an AC portion Ipd(AC) and a DC portion Ipd(DC). The circuitry includes a circuit element that is connected between the photodiode and the input to a Trans-Impedance Amplifier (TIA). Included in the circuit element is an AC bypass capacitor Cbp and a sensor. In detail, the sensor may be either a current sensor or a voltage sensor. In either case, the sensor establishes a cancellation current for removing the DC portion Ipd(DC) from the photocurrent while the AC bypass capacitor Cbp shunts an AC portion Ipd(AC) to ground. The result is that only an AC portion Ipd(AC) of the optical signal is maintained for input into the TIA.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Inventors: Chen-Kuo Sun, Jeb M. Binkley, Robert B. Welstand, Rajat Sharma
  • Publication number: 20220090963
    Abstract: A system for converting an optical signal into an electrical signal includes at least one differential Trans-Impedance Amplifier (TIA). To minimize (preferably eliminate) DC offset issues at the TIA output, an Input Counter-Offset (ICO) circuit is provided to remove the DC component of the initial optical signal from the input to the TIA. To further maximize the removal of DC offset at the TIA output, an Output Counter-Offset circuit is provided to take DC offset from the TIA output for use as a negative feedback directly to the input of the TIA. Modifications of the present invention are also intended for use with two TIA terminations and with a travelling wave photodiode.
    Type: Application
    Filed: January 14, 2021
    Publication date: March 24, 2022
    Inventors: Chen-Kuo Sun, Jeb M. Binkley, Robert B. Welstand
  • Patent number: 11280674
    Abstract: A system for converting an optical signal into an electrical signal includes at least one differential Trans-Impedance Amplifier (TIA). To minimize (preferably eliminate) DC offset issues at the TIA output, an Input Counter-Offset (ICO) circuit is provided to remove the DC component of the initial optical signal from the input to the TIA. To further maximize the removal of DC offset at the TIA output, an Output Counter-Offset circuit is provided to take DC offset from the TIA output for use as a negative feedback directly to the input of the TIA. Modifications of the present invention are also intended for use with two TIA terminations and with a travelling wave photodiode.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: March 22, 2022
    Assignee: VEO
    Inventors: Chen-Kuo Sun, Jeb M. Binkley, Robert B. Welstand
  • Patent number: 11201245
    Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOD metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: December 14, 2021
    Assignee: pSemi Corporation
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae-Youn Kim
  • Publication number: 20210194478
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Application
    Filed: August 6, 2020
    Publication date: June 24, 2021
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener
  • Patent number: 10895764
    Abstract: An EO phase shifter for modulating an electrical signal onto an optical wave is manufactured using CMOS process tools whereby a waveguide core made of EO material has intimate contacts with its electrodes. Specifically, the waveguide core is made of a Silicon-Rich Silicon Nitride (SRN) material which has a high linear refractive index n and a high third order nonlinear susceptibility. The electrodes are made of P or N doped silicon. Also, polarization of the optical wave is oriented normal to interfaces between the waveguide core and the electrodes. With this combination, the EO phase shifter exhibits high optical confinement, low propagation loss, and a high electro-optic overlap integral for modulation.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: January 19, 2021
    Assignee: VEO, INC.
    Inventors: Rajat Sharma, Chen-Kuo Sun, Robert B. Welstand
  • Patent number: 10818796
    Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: October 27, 2020
    Assignee: pSemi Corporation
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
  • Patent number: 10816832
    Abstract: In accordance with the present invention, an elongated phase shifting diode is provided for modulating an electrical signal onto an optical wave. Structurally, the phase shifting diode includes a p doped central stripe that extends through a phase shifting length L of a waveguide. P+ doped finger stripes and N+ doped finger stripes, which are laterally and axially offset from each other, extend into the waveguide for contact with the p doped central stripe along the length L. In combination, the plurality of N+ doped finger stripes and the p doped central stripe create a plurality of PN junctions that are structurally aligned along the p doped central stripe to establish electrically parallel phase shifting functions for the elongated diode.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: October 27, 2020
    Assignee: VEO, INC.
    Inventors: Robert B. Welstand, Chen-Kuo Sun, Rajat Sharma
  • Publication number: 20200335633
    Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOD metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Application
    Filed: January 9, 2020
    Publication date: October 22, 2020
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae-Youn Kim
  • Patent number: 10797690
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: October 6, 2020
    Assignee: pSemi Corporation
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener
  • Patent number: RE48944
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: February 22, 2022
    Assignee: pSemi Corporation
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener
  • Patent number: RE48965
    Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: March 8, 2022
    Assignee: pSemi Corporation
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim