Abstract: The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.

Abstract: The present invention relates to novel inventive compound device structures, enabling charged-based logic gates. In particular, a switched p-channel and/or n-channel current field effect transistor, a solid state device based on a complimentary pair of a switched p-channel and n-channel current field effect transistors, and/or a solid state device based on a complimentary pair of a p-channel and n-channel current field effect transistors are used for constructing such logic gates. The switched current field effect transistor comprising a source and a drain, wherein the source and drain defines a channel, a diffusion that divides the channel into a source channel segment between the source and the diffusion and a drain channel segment between the drain and the diffusion, a source channel gate that is coupled to the source channel, and a drain channel gate that coupled to the drain channel. These novel device structures provide various improvements over the conventional devices.

Abstract: The present invention relates to a multi-stage and feed forward compensated complimentary current field effect transistor amplifiers, enabling a charge-based approach that takes advantage of the exponential properties incurred in sub-threshold operation. A plurality of complimentary pairs of novel current field effect transistors are connected in series to form a multi-stage amplifier.

Abstract: The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.

Abstract: The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.

Abstract: The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.

Abstract: A novel voltage controlled oscillator (VCO) based on complementary current-injection field-effect transistor (CiFET) devices is disclosed. The VCO includes an odd number stages of rings, each of rings comprises a CiFET.

Abstract: Existing proportional to absolute temperature (PTAT)/complementary-to-absolute-temperature (CTAT) reference voltage circuit requires a large components count and foot print, precise device matching for accuracy and unsatisfactory sensitivity error or variation to temperature and humidity. The present invention relates to a novel approach for such reference voltage circuit based on a self-biased complementary pair of n-type and p-type current field-effect transistors, which provides rail PTAT, rail CTAT and analog reference voltages.

Abstract: The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.

Abstract: The present invention relates to an improvement to a current field effect transistor and trans-impedance MOS devices based on a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. The present invention further relates to a super-saturation current field effect transistor (xiFET), having a source, a drain, a diffusion, a first gate, and a second gate terminals, in which a source channel is defined between the source and diffusion terminals, a drain channel is defined between the drain and diffusion terminals. The first gate terminal is capacitively coupled to the source channel; and the second gate terminal is capacitively coupled to said drain channel. The diffusion terminal receives a current causing change in diffused charge density throughout said source and drain channel. The xiFET provides a fundamental building block for designing various analog circuits.

Abstract: The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current-injection field-effect transistors (NiFET and PiFET), and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel).

Abstract: Existing proportional to absolute temperature (PTAT)/complementary-to-absolute-temperature (CTAT) reference voltage circuit requires a large components count and foot print, precise device matching for accuracy and unsatisfactory sensitivity error or variation to temperature and humidity. The present invention relates to a novel approach for such reference voltage circuit based on a self-biased complementary pair of n-type and p-type current field-effect transistors, which provides rail PTAT, rail CTAT and analog reference voltages.

Abstract: The present invention relates to a multi-stage and feed forward compensated complimentary current field effect transistor amplifiers, enabling a charge-based approach that takes advantage of the exponential properties incurred in sub-threshold operation. A plurality of complimentary pairs of novel current field effect transistors are connected in series to form a multi-stage amplifier.

Abstract: The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current field-effect transistors (NiFET and PiFET) and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel).

Abstract: The present invention relates to a control circuit for producing a first and second control signals in order for a clock signal to break before making delays, comprising a first and second AND gates for receiving clock signals, first and second alignment blocks that receives output signals from the first and second AND gates for providing alignment prior to transmitting the first and second control signals, and generate the first and second control signals, respectively.

Abstract: The present invention relates to an improvement to a current field effect transistor and trans-impedance MOS devices based on a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. The present invention further relates to a super-saturation current field effect transistor (xiFET), having a source, a drain, a diffusion, a first gate, and a second gate terminals, in which a source channel is defined between the source and diffusion terminals, a drain channel is defined between the drain and diffusion terminals. The first gate terminal is capacitively coupled to the source channel; and the second gate terminal is capacitively coupled to said drain channel. The diffusion terminal receives a current causing change in diffused charge density throughout said source and drain channel. The xiFET provides a fundamental building block for designing various analog circuites.

Abstract: The present invention relates to a multi-stage and feed forward compensated complimentary current field effect transistor amplifiers, enabling a charge-based approach that takes advantage of the exponential properties incurred in sub-threshold operation. A plurality of complimentary pairs of novel current field effect transistors are connected in series to form a multi-stage amplifier.

Abstract: A novel phase locked loop design utilizing novel phase-frequency detector, charge pump, loop filter and voltage controlled oscillator is disclosed. The phase-frequency detector includes a dual reset D-flip flop for use in multi-GHz phase locked loops. Traditional dead zone issues associated with phase frequency detector are improved/addressed by use with a charge transfer-based PLL charge pump.

Abstract: The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current field-effect transistors (NiFET and PiFET) and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel).

Abstract: This invention relates to low noise sensor amplifiers and trans-impedance amplifiers using a complementary pair of current injection field effect transistor (iFET) devices (CiFET). CiFET includes a N-type current field-effect transistor (NiFET) and a P-type current field-effect transistor (PiFET), each of the NiFET and PiFET has a source, a drain, a gate, and a diffusion (current injection) terminal (iPort). Each iFET also has a source channel with a width and a length between the source and diffusion terminal, and drain channel with a width and a length between the drain and the diffusion terminal. A trans-impedance of the CiFET device is adjusted by a ratio of width/length of source channel over width/length of drain channel of the iFET and supply power voltage. In one configuration, the gate terminals of the NiFET and PiFET are connected together to form a common gate. In another configuration that common gate is configured as a voltage input for a high input impedance mode.