Patents by Inventor Robert Charles Frye

Robert Charles Frye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8823466
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: September 2, 2014
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 8803630
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: August 12, 2014
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 8669637
    Abstract: An integrated passive device system is disclosed including forming a first dielectric layer over a semiconductor substrate, depositing a metal capacitor layer on the first dielectric layer, forming a second dielectric layer over the metal capacitor layer, and depositing a metal layer over the second dielectric layer for forming the integrated capacitor, an integrated resistor, an integrated inductor, or a combination thereof.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: March 11, 2014
    Assignee: Stats ChipPac Ltd.
    Inventors: Yaojian Lin, Haijing Cao, Robert Charles Frye, Pandi Chelvam Marimuthu
  • Patent number: 8564382
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: October 22, 2013
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 8228154
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: July 24, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20120119329
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a first conductive layer disposed on a top surface of the substrate. A high resistivity layer is formed over the substrate and the first conductive layer. A dielectric layer is deposited over the substrate, first conductive layer and high resistivity layer. A portion of the dielectric layer, high resistivity layer, and first conductive layer forms a capacitor stack. A first passivation layer is formed over the dielectric layer. A second conductive layer is formed over the capacitor stack and a portion of the first passivation layer. A first opening is etched in the dielectric layer to expose a surface of the high resistivity layer. A third and fourth conductive layer is deposited over the first opening in the dielectric layer and a portion of the first passivation layer.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 17, 2012
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Robert Charles Frye
  • Patent number: 8111112
    Abstract: A semiconductor device has a first coil structure formed over the substrate. A second coil structure is formed over the substrate adjacent to the first coil structure. A third coil structure is formed over the substrate adjacent to the second coil structure. The first and second coil structures are coupled by mutual inductance, and the second and third coil structures are coupled by mutual inductance. The first, second, and third coil structures each have a height greater than a skin current depth of the coil structure defined as a depth which current reduces to 1/(complex permittivity) of a surface current value. In the case of copper, the coil structures have a height greater than 5 micrometers. The first, second, and third coil structures are arranged in rounded or polygonal pattern horizontally across the substrate with a substantially flat vertical profile.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: February 7, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 8111113
    Abstract: A semiconductor device has a first coil structure formed over the substrate. A second coil structure is formed over the substrate adjacent to the first coil structure. A third coil structure is formed over the substrate adjacent to the second coil structure. The first and second coil structures are coupled by mutual inductance, and the second and third coil structures are coupled by mutual inductance. The first, second, and third coil structures each have a height greater than a skin current depth of the coil structure defined as a depth which current reduces to 1/(complex permittivity) of a surface current value. A thin film capacitor is formed within the semiconductor device by a first metal plate, dielectric layer over the first metal plate, and second and third electrically isolated metal plates opposite the first metal plate. The terminals are located on the same side of the capacitor.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: February 7, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 7851257
    Abstract: An integrated circuit stacking system is provided including fabricating an integrated passive device including: providing a semiconductor substrate, forming an integrated inductor, a resistor block, or an integrated capacitor integrated on the semiconductor substrate, and forming contact pads, on the semiconductor substrate, coupled to the integrated inductor, the resistor block, or the integrated capacitor; positioning an integrated circuit die for maintaining an inductor spacing; mounting the integrated circuit die on the integrated passive device; and encapsulating the integrated circuit die and the integrated passive device.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: December 14, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Pandi Chelvam Marimuthu, Robert Charles Frye, Yaojian Lin
  • Publication number: 20100200951
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a first conductive layer disposed on a top surface of the substrate. A high resistivity layer is formed over the substrate and the first conductive layer. A dielectric layer is deposited over the substrate, first conductive layer and high resistivity layer. A portion of the dielectric layer, high resistivity layer, and first conductive layer forms a capacitor stack. A first passivation layer is formed over the dielectric layer. A second conductive layer is formed over the capacitor stack and a portion of the first passivation layer. A first opening is etched in the dielectric layer to expose a surface of the high resistivity layer. A third and fourth conductive layer is deposited over the first opening in the dielectric layer and a portion of the first passivation layer.
    Type: Application
    Filed: April 20, 2010
    Publication date: August 12, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Robert Charles Frye
  • Publication number: 20100140742
    Abstract: A semiconductor device has a first coil structure formed over the substrate. A second coil structure is formed over the substrate adjacent to the first coil structure. A third coil structure is formed over the substrate adjacent to the second coil structure. The first and second coil structures are coupled by mutual inductance, and the second and third coil structures are coupled by mutual inductance. The first, second, and third coil structures each have a height greater than a skin current depth of the coil structure defined as a depth which current reduces to 1/(complex permittivity) of a surface current value. A thin film capacitor is formed within the semiconductor device by a first metal plate, dielectric layer over the first metal plate, and second and third electrically isolated metal plates opposite the first metal plate. The terminals are located on the same side of the capacitor.
    Type: Application
    Filed: February 15, 2010
    Publication date: June 10, 2010
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20100140738
    Abstract: A semiconductor device has a first coil structure formed over the substrate. A second coil structure is formed over the substrate adjacent to the first coil structure. A third coil structure is formed over the substrate adjacent to the second coil structure. The first and second coil structures are coupled by mutual inductance, and the second and third coil structures are coupled by mutual inductance. The first, second, and third coil structures each have a height greater than a skin current depth of the coil structure defined as a depth which current reduces to 1/(complex permittivity) of a surface current value. In the case of copper, the coil structures have a height greater than 5 micrometers. The first, second, and third coil structures are arranged in rounded or polygonal pattern horizontally across the substrate with a substantially flat vertical profile.
    Type: Application
    Filed: February 15, 2010
    Publication date: June 10, 2010
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 7727879
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a first conductive layer disposed on a top surface of the substrate. A high resistivity layer is formed over the substrate and the first conductive layer. A dielectric layer is deposited over the substrate, first conductive layer and high resistivity layer. A portion of the dielectric layer, high resistivity layer, and first conductive layer forms a capacitor stack. A first passivation layer is formed over the dielectric layer. A second conductive layer is formed over the capacitor stack and a portion of the first passivation layer. A first opening is etched in the dielectric layer to expose a surface of the high resistivity layer. A third and fourth conductive layer is deposited over the first opening in the dielectric layer and a portion of the first passivation layer.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: June 1, 2010
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Robert Charles Frye
  • Patent number: 7688160
    Abstract: A coil structure for a filter device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil. A portion of the second coil is oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A portion of the third coil is oriented interiorly of the second coil.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: March 30, 2010
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20100045398
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Application
    Filed: October 27, 2009
    Publication date: February 25, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20100039185
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Application
    Filed: October 14, 2009
    Publication date: February 18, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20100033290
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Application
    Filed: October 14, 2009
    Publication date: February 11, 2010
    Applicant: STATS ChipPAC, LTD.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20100033289
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
    Type: Application
    Filed: October 14, 2009
    Publication date: February 11, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Kai Liu, Robert Charles Frye
  • Patent number: 7629860
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between secondhand third portions of the third coil.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: December 8, 2009
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye
  • Publication number: 20080303606
    Abstract: A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between secondhand third portions of the third coil.
    Type: Application
    Filed: June 8, 2007
    Publication date: December 11, 2008
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Kai Liu, Robert Charles Frye