Abstract: A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.

Abstract: An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstrapping transistors are connected between the gates of the pass-gate transistors and respective bias voltages. Coupling capacitors are connected between the gates and the output node. Additional coupling capacitors may be connected between the gates and the input node to make the resistor symmetric. In other embodiments, only one pass-gate transistor is used.

Abstract: A semiconductor die includes proximity connectors proximate to a surface of the semiconductor die. This semiconductor die is configured to communicate signals with another semiconductor die via proximity communication through one or more of the proximity connectors. In particular, the proximity connectors include a first group of proximity connectors that is configured to facilitate determining a first separation between the semiconductor die and the other semiconductor die by comparing coupling capacitances between the semiconductor die and the other semiconductor die. Note that the first group of proximity connectors includes a first proximity connector and a second proximity connector, and the second proximity connector at least partially encloses an in-plane outer edge of the first proximity connector.

Abstract: An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstrapping transistors are connected between the gates of the pass-gate transistors and respective bias voltages. Coupling capacitors are connected between the gates and the output node. Additional coupling capacitors may be connected between the gates and the input node to make the resistor symmetric. In other embodiments, only one pass-gate transistor is used.

Abstract: One embodiment of the present invention provides a system that asynchronously controls sending data items from a sender to a receiver. This system includes a set of sending FIFOs, a set of receiving FIFOs, as well as a shared data path between the sender and the receiver. The system also includes a set of control paths that operate in parallel between the sender and the receiver, wherein a given control path controls the transmission of data items between a corresponding sending FIFO and a corresponding receiving FIFO through the shared data path. The system further includes a round-robin scheduling mechanism which activates one control path at a time in a predetermined sequence. An activated control path asynchronously controls the sending of a data item from a corresponding sending FIFO to a corresponding receiving FIFO.

Abstract: A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.

Abstract: The present disclosure involves reconfigurable circuits that include an asynchronous data path with asynchronous control and at least one logic element coupled with the asynchronous data path that allows the circuit to be configured to more than one logical implementation through data and control token. In one particular example, the asynchronous data path with asynchronous control includes an interconnection of memory elements, such as latches, with each memory element including a corresponding asynchronous control element, such as a GasP element. One or more logical elements are coupled at one or more points of the data path, such coupling may involve feed-back, feed-forward, or combinations of both, and may include external data connections. Through distribution of data items and control tokens to the asynchronous data path with asynchronous control, the fixed logical coupling to the data path may be reconfigured to provide various logical arrangements.

Abstract: In a method for determining capacitance, a first time-varying signal is driven on a first terminal of a first capacitor and a second time-varying signal is driven on a first terminal of a second capacitor, where the first time-varying signal and the second time-varying signal have a pre-determined phase relationship with each other. These signals are received on second terminals of the first capacitor and the second capacitor and demodulated using a periodic signal to produce demodulated signals. This periodic signal has the same fundamental frequency as the first time-varying signal and the second time-varying signal. A DC component in the demodulated signals is then determined by filtering the demodulated signals, and the sign of the DC component is used to determine a relative capacitance of the first capacitor and the second capacitor.

Abstract: A semiconductor die includes proximity connectors proximate to a surface of the semiconductor die. This semiconductor die is configured to communicate signals with another semiconductor die via proximity communication through one or more of the proximity connectors. In particular, the proximity connectors include a first group of proximity connectors that is configured to facilitate determining a first separation between the semiconductor die and the other semiconductor die by comparing coupling capacitances between the semiconductor die and the other semiconductor die. Note that the first group of proximity connectors includes a first proximity connector and a second proximity connector, and the second proximity connector at least partially encloses an in-plane outer edge of the first proximity connector.

Abstract: In a method for determining capacitance, a first time-varying signal is driven on a first terminal of a first capacitor and a second time-varying signal is driven on a first terminal of a second capacitor, where the first time-varying signal and the second time-varying signal have a pre-determined phase relationship with each other. These signals are received on second terminals of the first capacitor and the second capacitor and demodulated using a periodic signal to produce demodulated signals. This periodic signal has the same fundamental frequency as the first time-varying signal and the second time-varying signal. A DC component in the demodulated signals is then determined by filtering the demodulated signals, and the sign of the DC component is used to determine a relative capacitance of the first capacitor and the second capacitor.

Abstract: A device includes a semiconductor die having a surface, a plurality of proximity connectors proximate to the surface, and a circuit coupled to at least one of the plurality of proximity connectors. The semiconductor die is configured to communicate voltage-mode signals through capacitive coupling using one or more of the plurality of proximity connectors. The circuit also includes a filter with a capacitive-summing junction to equalize the signals.

Abstract: An integrated circuit containing a communication channel is described. This communication channel includes a transmit circuit configured to transmit signals using a voltage-mode driver, a receive circuit, and a capacitive link that couples the transmit circuit to the receive circuit. The communication channel includes a filter with a capacitive-summing junction to equalize signals communicated between the transmit circuit and the receive circuit.

Abstract: A method for determining misalignment between two semiconductor dies is described in which signals are transmitted through a first subset of an array of proximity connectors that are proximate to a surface of one of the semiconductor dies and received through a second subset of an array of proximity connectors that are proximate to a surface of the other semiconductor die. A spatial beat frequency is determined from the received signals. This spatial beat frequency corresponds to misalignment-induced aliasing of spatial frequencies associated with the first subset of the array of proximity connectors and the second subset of the array of proximity connectors. The misalignment is then determined using the spatial beat frequency.

Abstract: A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.