Abstract: Embodiments of the present invention pendeoepitaxially grow sidewalls of posts in an underlying gallium nitride layer that itself is on a sapphire substrate, at high temperatures between about 1000° C. and about 1100° C. and preferably at about 1100° to reduce vertical growth of gallium nitride on the trench floor from interfering with the pendeoepitaxial growth of the gallium nitride sidewalls of the posts. Thus, widely available sapphire substrates may be used for pendeoepitaxial of gallium nitride, to thereby allow reduced cost and/or wider applications for gallium nitride devices. More specifically, gallium nitride semiconductor layers may be fabricated by etching an underlying gallium nitride layer on a sapphire substrate, to define at least one post in the underlying gallium nitride layer and at least one trench in the underlying gallium nitride layer. The at least one post includes a gallium nitride top and a gallium nitride sidewall. The at least one trench includes a trench floor.

Abstract: Methods of forming compound semiconductor layers include the steps of forming a plurality of selective growth regions at spaced locations on a first substrate and then forming a plurality of semiconductor layers at spaced locations on the first substrate by growing a respective semiconductor layer on each of the selective growth regions. The first substrate is then divided into a plurality of second smaller substrates that contain only a respective one of the plurality of semiconductor layers. This dividing step is preferably performed by partitioning (e.g., dicing) the first substrate at the spaces between the selective growth regions. The step of forming a plurality of semiconductor layers preferably comprises growing a respective compound semiconductor layer (e.g., gallium nitride layer) on each of the selective growth regions. The growing step may comprise pendeoepitaxially growing a respective gallium nitride layer on each of the selective growth regions.

Abstract: A gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a mask that includes an array of openings therein, and growing the underlying gallium nitride layer through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. Although dislocation defects may propagate vertically from the underlying gallium nitride layer to the grown gallium nitride layer through the mask openings, the overgrown gallium nitride layer is relatively defect free. The overgrown gallium nitride semiconductor layer may be overgrown until the overgrown gallium nitride layer coalesces on the mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer. The gallium nitride semiconductor layer may be grown using metalorganic vapor phase epitaxy. Microelectronic devices may be formed in the overgrown gallium nitride semiconductor layer.

Abstract: A gallium nitride microelectronic layer is fabricated by converting a surface of a (111) silicon layer to 3C-silicon carbide. A layer of 3C-silicon carbide is then epitaxially grown on the converted surface of the (111) silicon layer. A layer of 2H-gallium nitride then is grown on the epitaxially grown layer of 3C-silicon carbide. The layer of 2H-gallium nitride then is laterally grown to produce the gallium nitride microelectronic layer. In one embodiment, the silicon layer is a (111) silicon substrate, the surface of which is converted to 3C-silicon carbide. In another embodiment, the (111) silicon layer is part of a Separation by IMplanted OXygen (SIMOX) silicon substrate which includes a layer of implanted oxygen that defines the (111) layer on the (111) silicon substrate. In yet another embodiment, the (111) silicon layer is a portion of a Silicon-On-Insulator (SOI) substrate in which a (111) silicon layer is bonded to a substrate.

Abstract: Laminates of polyvinylidene fluoride films and sheets of resins thermoformable at temperatures greater than about 500° F. (260° C.), three dimensional structures formed therefrom and processes for their manufacture and use are disclosed.

Abstract: A method of manufacturing microalloyed structural steels by rolling in a CSP plant or compact strip production plant, wherein the cast slab strand is supplied divided into rolling lengths through an equalizing furnace to a multiple-stand CSP rolling train and is continuously rolled in the rolling train into hot-rolled wide strip, wherein the strip is cooled in a cooling section and is reeled into coils, and wherein, for achieving optimum mechanical properties, a controlled structure development by thermomechanical rolling is carried out as the thin slab travels through the CSP plant. For manufacturing high-strength microalloyed structural steels with a yield point of ≧480 MPa, the available strengthening mechanisms are utilized in a complex manner in order to achieve an optimum property complex with respect to strength and toughness of the structural steels, by carrying out, in addition to the thermomechanical rolling with the method steps according to U.S. patent application Ser. No. 09/095,338 filed Jun.

Abstract: An underlying gallium nitride layer on a silicon carbide substrate is masked with a mask that includes an array of openings therein, and the underlying gallium nitride layer is etched through the array of openings to define posts in the underlying gallium nitride layer and trenches therebetween. The posts each include a sidewall and a top having the mask thereon. The sidewalls of the posts are laterally grown into the trenches to thereby form a gallium nitride semiconductor layer. During this lateral growth, the mask prevents nucleation and vertical growth from the tops of the posts. Accordingly, growth proceeds laterally into the trenches, suspended from the sidewalls of the posts. The sidewalls of the posts may be laterally grown into the trenches until the laterally grown sidewalls coalesce in the trenches to thereby form a gallium nitride semiconductor layer.

Abstract: A gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a mask that includes an array of openings therein, and growing the underlying gallium nitride layer through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. Although dislocation defects may propagate vertically from the underlying gallium nitride layer to the grown gallium nitride layer through the mask openings, the overgrown gallium nitride layer is relatively defect free. The overgrown gallium nitride semiconductor layer may be overgrown until the overgrown gallium nitride layer coalesces on the mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer. The gallium nitride semiconductor layer may be grown using metalorganic vapor phase epitaxy. Microelectronic devices may be formed in the overgrown gallium nitride semiconductor layer.

Abstract: High surface area Mo.sub.2 N or MoN electrodes for use in high energy density energy storage devices, and processes for fabricating the electrodes, are described wherein a precursor molybdenum solution is applied to a metallic foil substrate which is heated to produce a MoO.sub.3 coating on the substrate, which coating is converted to Mo.sub.2 N and MoN by reaction with ammonia. Mo.sub.2 N and MoN electrodes are also produced in a chemical vapor deposition process in which molybdenum pentachloride carried by an inert gas and ammonia are the reaction gases for producing Mo.sub.2 N and MoN films.

Abstract: A method and resulting ohmic contact structure between a high work function metal and a wide bandgap semiconductor for which the work function of the metal would ordinarily be insufficient to form an ohmic contact between the metal and the semiconductor. The structure can withstand annealing while retaining ohmic characteristics. The ohmic contact structure comprises a portion of single crystal wide bandgap semiconductor material; a contact formed of a high work function metal on the semiconductor portion; and a layer of doped p-type semiconductor material between the single crystal portion and the metal contact. The doped layer has a sufficient concentration of p-type dopant to provide ohmic behavior between the metal and the semiconductor material.

Abstract: A method and resulting ohmic contact structure between a high work function metal and a wide bandgap semiconductor for which the work function of the metal would ordinarily be insufficient to form an ohmic contact between the metal and the semiconductor. The structure can withstand annealing while retaining ohmic characteristics. The ohmic contact structure comprises a portion of single crystal wide bandgap semiconductor material; a contact formed of a high work function metal on the semiconductor portion; and a layer of doped p-type semiconductor material between the single crystal portion and the metal contact. The doped layer has a sufficient concentration of p-type dopant to provide ohmic behavior between the metal and the semiconductor material.

Abstract: Laminar structures of PVF and substantially amorphous resin such as PEKK, backfilled with injection molding resin, exhibit an excellent combination of physical and aesthetic properties.

Abstract: Thin laminates of polyarylether ketone ketone and polyvinyl fluoride can be embossed without destruction of the polyvinyl fluoride and, on combustion, result in low smoke levels.

Abstract: The invention is a method of ion implantation of dopant ions into a substrate of silicon carbide. In the method, the implantation takes place at elevated temperatures, following which the substrate may be oxidized or annealed.

Abstract: Device quality monocrystalline Alpha-SiC thin films are epitaxially grown by chemical vapor deposition on Alpha-SiC [0001] substrates prepared off axis.

Abstract: A process for preparing laminates of polyvinyl fluoride and at least one other fluoropolymer that are free from adhesive at the interface by dispersion coating a first film to form a second film and curing the second film at a temperature below the melting point of the first film.

Abstract: The invention comprises a method of forming a diode which is operable at high temperature, at high power levels, and under conditions of high radiation density. The method comprises bombarding a region of a substrate of doped silicon carbide having a first conductivity type with high temperature ion implantation of doping ions into the substrate to give the bombarded region an opposite conductivity type. Regions of opposite conductivity type adjacent one another and a respective p-n junction are thereby formed. Ohmic contacts are added to the substrate and to the bombarded region to complete the diode.

Abstract: Device quality monocrystalline Alpha-SiC thin films are epitaxially grown by chemical vapor deposition on Alpha-SiC [0001] substrates prepared off axis.

Abstract: Device quality thin films of Beta-SiC are epitaxially grown on substrates of Alpha-Sic.

Abstract: The present invention is a method of forming large device quality single crystals of silicon carbide. The sublimation process is enhanced by maintaining a constant polytype composition in the source materials, selected size distribution in the source materials, by specific preparation of the growth surface and seed crystals, and by controlling the thermal gradient between the source materials and the seed crystal.