Abstract: An optically addressed spatial light modulator may be formed with an integrated light emitting device display. The light emitting device display may be formed of a size and cost that optimizes the overall modulator design. In addition, by integrating the modulator and display devices, the overall size of the spatial light modulator may be reduced in some embodiments.

Abstract: A display may be driven to compensate for the effects of aging on the display. In particular, the temperature of the display may be determined on an ongoing basis and utilized to further correct total integrated charge for temperature effects.

Abstract: An organic light emitting device display may be compensated for color variations between sub-pixels of the same expressed color. This may be done initially upon manufacture of the display and may be continued and updated in the course of the display's lifetime to compensate for differential effects of aging on different expressed sub-pixels. In accordance with one embodiment of the present invention, the display may be driven to achieve a color gamut that substantially all of the pixels are capable of achieving.

Abstract: A backframe may be utilized to align a plurality of emissive display tiles precisely with respect to one another. The individual display tiles may be removable from the backframe for replacement or other reasons. As a result, the spacing between individual tiles in an overall large format display may be precisely controlled in some cases. In addition, regularly occurring gaps between adjacent tiles may be filled with a suitable light absorbing material to reduce the visibility of seams.

Abstract: A method is provided for maximizing substrate usage in the fabrication of flat panel displays or detectors, while also maximizing electrostatic protection for the displays or detectors. Initially, at least two detectors are positioned on the substrate, with each of the detectors having a guard ring of a certain width. At least a section of the guard ring width of one detector is approximately adjacent to a section of the guard ring width of another detector. The approximately adjacent guard ring width sections are then positioned such that a maximum overlap of the adjacent guard ring width sections is achieved, while still providing each display or detector with electrostatic discharge protection. Each of the detectors is separated from the other detectors and the remainder of the substrate by the process of scribing partially through the substrate and breaking at the scribe mark or by sawing.

Abstract: A solid state array device includes a plurality of pixels with associated respective TFT switching transistors; a plurality of first address lines disposed in a first layer of the array device; a plurality of second conductive address lines disposed in a second layer of the array device, respective ones of said first and second address lines being disposed substantially perpendicular to one another in a matrix arrangement such that respective ones of the second address lines overlie respective ones of the first address lines at respective crossover regions; a TFT gate dielectric layer disposed in a channel region of each of the pixel TFTs and further being disposed over the first address lines; and a crossover region supplemental dielectric layer disposed in respective ones of the crossover regions between the first and second address lines, but disposed so as to not extend over the TFT channel regions.

Abstract: A method of repairing an open circuit defect in a damaged address line in a thin film electronic imager device includes the steps of forming a repair area on the device so as to expose the open-circuit defect in the damaged address line and then depositing a conductive material to form a second conductive component and to coincidentally form a repair shunt in the repair area so as to electrically bridge the defect. The step of forming the repair area includes the steps of ablating dielectric material disposed over the first conductive component in the repair area, and etching the repair area so as to remove dielectric material disposed over the defect in the address line in the repair area such that the surface of the address line conductive material is exposed but is not contaminated by the removal of the overlying dielectric material.

Abstract: A radiation imager includes a photosensor barrier layer disposed between an amorphous silicon photosensor array and the scintillator. The barrier layer includes two strata, the first stratum being silicon oxide disposed over the upper conductive layer of the photosensor array and the second stratum is silicon nitride that is disposed over the first stratum. The photosensor barrier layer has a shape that substantially conforms to the the shape of the underlying upper conductive layer and has a maximum thickness of about 3 microns. The silicon oxide and silicon nitride are deposited in a vapor deposition process at less than about 250.degree. C. using tetraethoxysilane (TEOS) as the silicon source gas.

Abstract: An imager array data line repair structure for use in high performance imager arrays includes a first and a second plurality of address lines that are disposed in respective layers with an intermediate layer having at least one insulative material disposed therebetween. The imager device further includes at least one integral address line repair segment that is disposed in the same layer as the first address lines and that is electrically isolated from the first address lines; the integral address line repair segment is disposed so as to underlie a repair portion of the second address line, with the intermediate layer disposed therebetween, and has a width substantially the same as the overlying second address line.

Abstract: In the fabrication of thin-film field-effect transistors, a dielectric island is first formed over a gate and between locations where source and drain contacts are to be deposited. A dielectric cap with an overhanging brim is formed on the island. A layer of SD metal which will form the source-drain contacts is next deposited. Because of the overhang, the SD metal does not coat the entire cap, but leaves part of the cap remaining exposed and attackable by an etchant. Application of an etchant etches away the island and the cap, thereby lifting off the SD metal coated on the cap, leaving the fully-formed source and drain contacts in place, separated by the extent of the island.

Abstract: A thin-film field-effect transistor is fabricated by forming an electrically insulative island between the source and the drain. A cap is formed on the island with a brim that overhangs the island. A layer of source-drain metal, which will subsequently constitute the source and drain contacts, is then deposited upon the source, the drain, and the cap, but the overhang creates an exposed region which can be attacked by an etchant. When the etchant is applied, it etches away the cap, thereby lifting off the source-drain metal which coated the cap, leaving the fully formed source and drain contacts separated by the island.

Abstract: A solid state radiation imager includes a photosensor array having a plurality of pixels disposed on a substrate, each pixel having a respective photosensor coupled to a thin film transistor (TFT). The photosensor array further includes an opaque passivation layer that is disposed over non-photodiode areas of the photosensor array, including the TFT and address lines in the array. The opaque passivation layer has an absorbance that is greater than 1, and typically that is greater than 2. The opaque passivation layer further is typically made of a thermally stable polymer mixed with a light absorbing material such as an organic dye (e.g., Sudan Black B), carbon black, or graphite.

Abstract: A radiation imager includes a photosensor array having a plurality of individually addressable pixels, each pixel having a photosensor island and an associated thin film transistor (TFT) disposed to selectively electrically couple the photosensor island to a predetermined address line. In each pixel a single common passivation layer is disposed over the TFT and the photosensor island such that the passivation layer is adjacent to both the outer surfaces of the TFT and portions of the photosensor island. In a method of fabricating a photosensor array as described above, after depositon of a source-drain metal layer, the layer is left unpatterned until after the photosensor island has been formed. In the formation of the photosensor island the source-drain metal layer serves as an etch stop to protect the TFT. Following formation of the photosensor island, the source-drain metal layer is patterned to form source and drain electrodes and fabrication of the TFT is completed.

Abstract: A high yield method of fabricating an ultrasound array having densely packed ultrasound elements with smooth surface finishes includes the steps of: 1) applying an acoustic matching material to opposites faces (or surfaces) of a piezo electric material ceramic block; 2) cutting the block in a plane perpendicular to the two faces of the block so as to form a plurality of wafers having the acoustic matching material disposed on opposite ends; 3) assembling the wafers to form a laminated body having respective portions of the matching layer on opposite surfaces and with the wafers each being separated from an adjacent wafer by a selected gap distance and bonded together by a polymeric adhesive material; 4) cutting the laminated body along a longitudinal axis so as to form a first laminate body subassembly and a second laminate body subassembly, each of the subassemblies having a front surface having the acoustic matching material disposed thereon and a back surface where the laminate body was cut; 5) applying a

Abstract: In depositing films upon a plate by use of plasma-enhanced chemical vapor deposition, variations in thickness of the film that normally occur at the edges of the plate are reduced by positioning a frame of tiles around the plate. The frame provides a sacrificial edge at which thickness variations at the edge of the film can occur. After deposition, removal of the frame results in improved uniformity of film thickness on the plate itself.

Abstract: A solid state radiation imager pixel having a thin film transistor (TFT) coupled to a photodiode in which the photodiode and the TFT each comprise a common dielectric layer, that is, a single dielectric layer that extends across the pixel and that has a gate dielectric layer portion and a photodiode body passivation portion. The common dielectric layer comprises a monolithic dielectric material such as silicon nitride or silicon oxide. Further, the bottom electrode of the photosensor body and the gate electrode are each disposed on a common surface of the substrate and comprise the same conductive material, the conductive material having been deposited on the pixel in the same deposition process. The source and drain electrodes and the common contact electrode for the photodiode each comprises the same source/drain metal conductive material, the conductive material having been deposited on the pixel in the same deposition process.

Abstract: Repair lines in an imager device include protective layers disposed over steps in the repair lines where the repair lines extend over underlying components in the imager array. The protective layers each include a layer of polyimide to provide protection for the step portions of the conductive repair line from etchants and the like to which the conductive line is exposed during fabrication processes for the imager array. The protective layers are disposed over the steps of a conductive line in a repair crossover region so as to provide a repair area free from the protective material of the protective layers disposed thereon in the repair crossover region where the conductive repair line is disposed in vertical alignment with an underlying address line.

Abstract: A process for locating common electrode shorts in an electronic array, such as an x- y- addressed imager assembly having a short circuit between an address line and an overlying common electrode layer, includes the steps of applying a test voltage to the addressed line shorted to the common electrode, measuring current at each of a plurality of common electrode contact points disposed at selected intervals along selected edges of the common electrode, and processing the respective measured currents in accordance with a selected relationship to localize a short circuit location along the length of the shorted address line. In imager assembly arrangements in which it is possible to measure currents on opposite sides of the common electrode disposed substantially perpendicular to the orientation of the shorted address line, the selected relationship is I.sub.A-N /I.sub.a-n =(L-X)/X, wherein: I.sub.A-N are the measured currents from common electrode contact points along one common electrode opposite edge; I.sub.

Abstract: A radiation imager includes a photosensor barrier layer disposed between an amorphous silicon photosensor array and the scintillator. The barrier layer includes two strata, the first stratum being silicon oxide disposed over the upper conductive layer of the photosensor array and the second stratum is silicon nitride that is disposed over the first stratum. The photosensor barrier layer has a shape that substantially conforms to the the shape of the underlying upper conductive layer and has a maximum thickness of about 3 microns. The silicon oxide and silicon nitride are deposited in a vapor deposition process at less than about 250.degree. C. using tetraethoxysilane (TEOS) as the silicon source gas.

Abstract: A solid state radiation imager pixel having a thin film transistor (TFT) coupled to a photodiode in which the photodiode and the TFT each comprise a common dielectric layer, that is, a single dielectric layer that extends across the pixel and that has a gate dielectric layer portion and a photodiode body passivation portion. The common dielectric layer comprises a monolithic dielectric material such as silicon nitride or silicon oxide. Further, the bottom electrode of the photosensor body and the gate electrode are each disposed on a common surface of the substrate and comprise the same conductive material, the conductive material having been deposited on the pixel in the same deposition process. The source and drain electrodes and the common contact electrode for the photodiode each comprises the same source/drain metal conductive material, the conductive material having been deposited on the pixel in the same deposition process.