Patents by Inventor Robert Francis Darveaux

Robert Francis Darveaux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180096949
    Abstract: A packaged radio-frequency device is disclosed, including a packaging substrate configured to receive one or more components, the packaging substrate including a first side and a second side. A shielded package may be implemented on the first side of the packaging substrate, the shielded package including a first circuit and a first overmold structure, the shielded package configured to provide radio-frequency shielding for at least a portion of the first circuit. A set of through-mold connections may be implemented on the second side of the packaging substrate, the set of through-mold connections defining a mounting volume on the second side of the packaging substrate. The device may include a component implemented within the mounting volume and a second overmold structure substantially encapsulating one or more of the component or the set of through-mold connections.
    Type: Application
    Filed: October 4, 2017
    Publication date: April 5, 2018
    Inventors: Howard E. CHEN, Robert Francis DARVEAUX
  • Publication number: 20180096951
    Abstract: A method for manufacturing packaged radio-frequency devices is disclosed, including providing a packaging substrate configured to receive a plurality of components, the packaging substrate including a first side and a second side. The method further includes forming a shielded package on the first side of the packaging substrate, the shielded package including a first circuit and a first overmold structure, the shielded package configured to provide radio-frequency shielding for at least a portion of the first circuit. The method includes mounting a component on the second side of the packaging substrate, forming a second overmold structure over the component and forming a set of cavities in the second overmold structure, the set of cavities positioned relative to the component. The method includes forming a set of through-mold connections in the set of cavities in the second overmold structure.
    Type: Application
    Filed: October 4, 2017
    Publication date: April 5, 2018
    Inventors: Howard E. CHEN, Robert Francis DARVEAUX, Hoang Mong NGUYEN
  • Publication number: 20180096950
    Abstract: A method for manufacturing packaged radio-frequency devices is disclosed, including providing a packaging substrate configured to receive a plurality of components, the packaging substrate including a first side and a second side. The method includes forming a shielded package on the first side of the packaging substrate, the shielded package including a first circuit and a first overmold structure, the shielded package configured to provide RF shielding for at least a portion of the first circuit. The method further includes mounting a component on the second side of the packaging substrate and arranging a set of through-mold connections on the second side of the packaging substrate such that the set of through-mold connections is positioned relative to the component. The method includes forming a second overmold structure over the component and the set of through-mold connections and removing a portion of the second overmold structure.
    Type: Application
    Filed: October 4, 2017
    Publication date: April 5, 2018
    Inventors: Howard E. CHEN, Robert Francis DARVEAUX, Hoang Mong NGUYEN
  • Publication number: 20180090409
    Abstract: A fingerprint sensor package, including a sensing side for sensing fingerprint information and a separate connection side for electrically connecting the fingerprint sensor package to a host device, is disclosed. The fingerprint sensor package can also include a sensor integrated circuit facing the sensing side and substantially surrounded by a fill material. The fill material includes vias at peripheral locations around the sensor integrated circuit. The fingerprint sensor package can further include a redistribution layer on the sensing side which redistributes connections of the sensor integrated circuit to the vias. The connections can further be directed through the vias to a ball grid array on the connection side. Some aspects also include electrostatic discharge traces positioned at least partially around a perimeter of the connection side. Methods of manufacturing are also disclosed.
    Type: Application
    Filed: September 5, 2017
    Publication date: March 29, 2018
    Inventors: Ronald Patrick Huemoeller, David Bolognia, Robert Francis Darveaux, Brett Arnold Dunlap
  • Patent number: 9754852
    Abstract: A fingerprint sensor package, including a sensing side for sensing fingerprint information and a separate connection side for electrically connecting the fingerprint sensor package to a host device, is disclosed. The fingerprint sensor package can also include a sensor integrated circuit facing the sensing side and substantially surrounded by a fill material. The fill material includes vias at peripheral locations around the sensor integrated circuit. The fingerprint sensor package can further include a redistribution layer on the sensing side which redistributes connections of the sensor integrated circuit to the vias. The connections can further be directed through the vias to a ball grid array on the connection side. Some aspects also include electrostatic discharge traces positioned at least partially around a perimeter of the connection side. Methods of manufacturing are also disclosed.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: September 5, 2017
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, David Bolognia, Robert Francis Darveaux, Brett Arnold Dunlap
  • Publication number: 20170042069
    Abstract: Apparatus and methods related to conformal coating implemented with surface mount devices. In some embodiments, a radio-frequency (RF) module includes a packaging substrate configured to receive a plurality of components. The RF also includes a surface mound device (SMD) mounted on the packaging substrate, the SMD including a metal layer that faces upward when mounted. The RF module further includes an overmold formed over the packaging substrate, the overmold dimensioned to cover the SMD. The RF module further includes an opening defined by the overmold at a region over the SMD, the opening having a depth sufficient to expose at least a portion of the metal layer. The RF module further includes a conformal conductive layer formed over the overmold, the conformal conductive layer configured to fill at least a portion of the opening to provide an electrical path between the conformal conductive layer and the metal layer of the SMD.
    Type: Application
    Filed: August 10, 2016
    Publication date: February 9, 2017
    Inventors: Anthony James LOBIANCO, Howard E. CHEN, Robert Francis DARVEAUX, Hoang Mong NGUYEN, Matthew Sean READ, Lori Ann DEORIO
  • Patent number: 9496210
    Abstract: A stackable package is placed within a mold during an encapsulation operation. A compliant surface, e.g., of a compliant film, of the mold is pressed down on upper interconnection balls of the stackable package to force upper portions of the upper interconnection balls into the mold. However, lower portions of the upper interconnection balls are exposed within a space between the compliant surface and a substrate of the stackable package. The space is filled with a dielectric material to form a package body. The package body is formed while at the same time exposing the upper portions of upper interconnection balls from the package body in a single encapsulation operation. By avoiding selective removal of the package body to expose the upper interconnection balls, the number of operations as well as cost to manufacture the stackable package is minimized.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: November 15, 2016
    Inventors: Robert Francis Darveaux, Roger D. St. Amand, Vladimir Perelman
  • Patent number: 9462690
    Abstract: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: October 4, 2016
    Inventors: Robert Francis Darveaux, David McCann, John McCormick, Louis W. Nicholls
  • Patent number: 9419667
    Abstract: Disclosed are apparatus and methods related to conformal coating of radio-frequency (RF) modules. In some embodiments, a module can include an overmold formed over an RF component mounted on a packaging substrate. The overmold can also cover a surface-mount device (SMD) such as an RF filter implemented as a chip size surface acoustic wave (SAW) device (CSSD). The module can further include a conductive layer formed over the overmold and configured to provide RF shielding functionality for the module. The conductive layer can be electrically connected to a ground plane of the packaging substrate through the SMD. An opening can be formed in the overmold over the SMD; and the conductive layer can conform to the opening to electrically connect the conductive layer with an upper surface of the SMD and thereby facilitate the grounding connection.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: August 16, 2016
    Assignee: Skyworks Solutions, Inc.
    Inventors: Anthony James Lobianco, Howard E. Chen, Robert Francis Darveaux, Hoang Mong Nguyen, Matthew Sean Read, Lori Ann Deorio
  • Publication number: 20160099192
    Abstract: Dual-sided radio-frequency package having ball grid array. In some embodiments, a packaged radio-frequency (RF) device may include a packaging substrate configured to receive a plurality of components, the packaging substrate including a first side and a second side. The packaged RF device also includes a shielded package implemented on the first side of the packaging substrate, the shielded package including an RF circuit, the shielded package configured to provide RF shielding for at least a portion of the RF circuit. The packaged RF device further includes a ball-grid array (BGA) implemented on the second side of the packaging substrate, the BGA defining a mounting volume on the second side of the packaging substrate and a component implemented within the mounting volume.
    Type: Application
    Filed: July 31, 2015
    Publication date: April 7, 2016
    Inventors: Howard E. CHEN, Robert Francis DARVEAUX, Matthew Sean READ
  • Publication number: 20160035679
    Abstract: Devices and method related to dual-sided radio-frequency package having substrate cavity. In some embodiment, a packaged RF device includes a packaging substrate configured to receive a plurality of components, the packaging substrate including a first side and a second side, the second side of the packaging substrate defining a pocket. The packaged RF device also includes a shielded package implemented on the first side of the packaging substrate, the shielded package including an RF circuit, the shielded package configured to provide RF shielding for at least a portion of the RF circuit. The packaged RF device further includes a component mounted substantially within the pocket of the second side of the packaging substrate.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 4, 2016
    Inventors: Howard E. CHEN, Anil K. AGARWAL, Robert Francis DARVEAUX, Sandra Louise PETTY-WEEKS, Amish Sudhir NAIK, Robert H WILLIAMS, Matthew Sean READ
  • Patent number: 8941250
    Abstract: A redistribution pattern is formed on active surfaces of electronic components while still in wafer form. The redistribution pattern routes bond pads of the electronic components to redistribution pattern terminals on the active surfaces of the electronic components. The bond pads are routed to the redistribution pattern terminals while still in wafer form, which is a low cost and high throughput process, i.e., very efficient process.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: January 27, 2015
    Inventors: Robert Francis Darveaux, Brett Arnold Dunlap, Ronald Patrick Huemoeller
  • Publication number: 20140307394
    Abstract: Disclosed are apparatus and methods related to conformal coating of radio-frequency (RF) modules. In some embodiments, a module can include an overmold formed over an RF component mounted on a packaging substrate. The overmold can also cover a surface-mount device (SMD) such as an RF filter implemented as a chip size surface acoustic wave (SAW) device (CSSD). The module can further include a conductive layer formed over the overmold and configured to provide RF shielding functionality for the module. The conductive layer can be electrically connected to a ground plane of the packaging substrate through the SMD. An opening can be formed in the overmold over the SMD; and the conductive layer can conform to the opening to electrically connect the conductive layer with an upper surface of the SMD and thereby facilitate the grounding connection.
    Type: Application
    Filed: April 14, 2014
    Publication date: October 16, 2014
    Inventors: Anthony James LOBIANCO, Howard E. CHEN, Robert Francis DARVEAUX, Hoang Mong NGUYEN, Matthew Sean READ, Lori Ann DEORIO
  • Patent number: 8847372
    Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: September 30, 2014
    Inventors: Robert Francis Darveaux, Michael Barrow, Miguel Angel Jimarez, Jae Dong Kim, Dae Keun Park, Ki Wook Lee, Ju Hoon Yoon
  • Patent number: 8753730
    Abstract: A method of fabricating a plurality of electronic component packages includes coupling a tape to a panel. Electronic components are coupled to the tape and encapsulated to form a molded wafer. The molded wafer is mechanically separated from the panel without heating by breaking a mechanical separation adhesive of the tape. By mechanically separating the molded wafer from the panel without heating, warpage of the molded wafer associated with heating is avoided.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: June 17, 2014
    Inventors: Brett Arnold Dunlap, Robert Francis Darveaux
  • Patent number: 8704369
    Abstract: A method includes forming a patterned buildup layer on a first surface of a dielectric layer, the patterned buildup layer including a patterned buildup layer opening exposing a trace coupled to the dielectric layer. A conductor layer is flash plated on the patterned buildup layer and within the patterned buildup layer opening. The patterned buildup layer opening is filled with a blanket conductive filler layer. The blanket conductive filler layer and the conductor layer are planarized to form a flip chip bump.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: April 22, 2014
    Inventors: Ronald Patrick Huemoeller, Roger D. St. Amand, Robert Francis Darveaux
  • Patent number: 8653674
    Abstract: A redistribution pattern is formed on active surfaces of electronic components while still in wafer form. The redistribution pattern routes bond pads of the electronic components to redistribution pattern terminals on the active surfaces of the electronic components. The bond pads are routed to the redistribution pattern terminals while still in wafer form, which is a low cost and high throughput process, i.e., very efficient process.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: February 18, 2014
    Inventors: Robert Francis Darveaux, Brett Arnold Dunlap, Ronald Patrick Huemoeller
  • Patent number: 8541260
    Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a apace between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surfaces, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: September 24, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Robert Francis Darveaux, Michael Barrow, Miguel Angel Jimarez, Jae Dong Kim, Dae Keun Park, Ki Wook Lee, Ju Hoon Yoon
  • Patent number: 8536458
    Abstract: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: September 17, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Robert Francis Darveaux, David McCann, John McCormick, Louis W. Nicholls
  • Patent number: 8536462
    Abstract: A flex circuit package includes a package body enclosing an electronic component and a first surface of the substrate. Columns are physically and electrically connected to first traces of the substrate, the columns extending through the package body. A flexible circuit connector has first terminals connected to the columns. The flexible circuit connector further includes second terminals that provide an electrical interconnection structure for electrical connection to a second electronic component structure. By connecting the flexible circuit connector to the columns extending through the package body, special routing of traces of the substrate of the flex circuit package to provide an interface for the flexible circuit connector is avoided.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: September 17, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Robert Francis Darveaux, Ludovico E. Bancod, Marnie Ann Mattei, Timothy Lee Olson