Abstract: A system and method for determining a Physical Uplink Control Channel (PUCCH) power control parameter h(nCQI,nHARQ) for two Carrier Aggregated (CA) PUCCH formats—PUCCH format 3 and channel selection. The value of h(nCQI,nHARQ) may be based on only a linear function of nHARQ for both of the CA PUCCH formats. Based on the CA PUCCH format configured for the User Equipment (UE), the e-Node B (eNB) may instruct the UE to select or apply a specific linear function of nHARQ as a value for the power control parameter h(nCQI,nHARQ), so as to enable the UE to more accurately establish transmit power of its PUCCH signal. Values for another PUCCH power control parameter—?F_PUCCH(F)—are also provided for use with PUCCH format 3. A new offset parameter may be signaled for each PUCCH format that has transmit diversity configured.

Abstract: Various methods and systems are provided for stationary computed tomography (CT) imaging. In one embodiment, a stationary CT system includes one or more detector arrays extending around at least a portion of an imaging volume, a stationary distributed x-ray source unit comprising a plurality of emitters including a first set of emitters configured to operate at a first voltage and a second set of emitters configured to operate at a second voltage, different than the first voltage, and a source controller for triggering the first set of emitters for acquiring first projection data by the one or more detector arrays and triggering the second set of emitters for acquiring second projection data by the one or more detector arrays, the first projection data and the second projection data usable to reconstruct one or more basis material composition images or monochromatic images of an object within the imaging volume.

Abstract: Embodiments of the present disclosure provide a method, a transmitter node, a receiver node, and a computer program product for communication of information in a communication channel comprising at least one main band and an adjacent guard band. The method is performed by a transmitter node in a wireless communication network. The method comprises determining whether to transmit information in the guard band based one or more configured transmission parameters associated with the transmitter node. Upon determination to transmit information in the guard band, the method comprises determining transmission power for frequency resources allocated in the guard band based on a spectral mask defining a power density limit across an allocated frequency range. The method further comprises transmitting first information on the frequency resources allocated in the guard band and second information on frequency resources allocated in the main band to a receiver node according to the determined transmission power.

Abstract: An air filter, including: at least one wall-flow honeycomb particulate filter having at least one coat on at least a portion of the interior surface of the filter, wherein the at least one coat comprises at least one of: a sorbent; a catalyst; or a combination thereof, and the air filter, in-use, retains from filtered air at least one of: a particulate, a volatile organic compound, or a combination thereof. Also disclosed is an interior air purification system including the air filter, and methods of making and using the air filter.

Abstract: An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either a body bias voltage or a power supply voltage to biasing wells. A first pad for coupling with a first externally disposed pin can optionally be provided. The first pad is for receiving an externally applied body bias voltage. Circuitry for producing a body bias voltage can be coupled to the first pad for coupling a body bias voltage to a plurality of biasing wells disposed on the integrated circuit device. If a body bias voltage is not provided, the resistive structure automatically couples a power supply voltage to the biasing wells. The power supply voltage may be obtained internally to the integrated circuit.

Abstract: An interconnect multiplexer comprises a plurality of CMOS pass gates of a first multiplexer stage coupled to receive data to be output by the interconnect multiplexer; an output inverter coupled to the outputs of the plurality of CMOS pass gates, wherein an output of the output inverter is an output of the interconnect multiplexer; and a plurality of memory elements coupled to the plurality of CMOS pass gates; wherein inputs to the plurality of CMOS pass gates are pulled to a common potential during a startup mode. A method of reducing contention currents in an integrated circuit is also disclosed.

Abstract: An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either a body bias voltage or a power supply voltage to biasing wells. A first pad for coupling with a first externally disposed pin can optionally be provided. The first pad is for receiving an externally applied body bias voltage. Circuitry for producing a body bias voltage can be coupled to the first pad for coupling a body bias voltage to a plurality of biasing wells disposed on the integrated circuit device. If a body bias voltage is not provided, the resistive structure automatically couples a power supply voltage to the biasing wells. The power supply voltage may be obtained internally to the integrated circuit.

Abstract: An air filter, including: at least one wall-flow honeycomb particulate filter having at least one coat on at least a portion of the interior surface of the filter, wherein the at least one coat comprises at least one of: a sorbent; a catalyst; or a combination thereof, and the air filter, in-use, retains from filtered air at least one of: a particulate, a volatile organic compound, or a combination thereof. Also disclosed is an interior air purification system including the air filter, and methods of making and using the air filter.

Abstract: An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either an external body bias voltage or a power supply voltage to biasing wells. A first pad for coupling with a first externally disposed pin can optionally be provided. The first pad is for receiving an externally applied body bias voltage. Circuitry for producing a body bias voltage can be coupled to the first pad for coupling a body bias voltage to a plurality of biasing wells disposed on the integrated circuit device. If an externally applied body bias voltage is not provided, the resistive structure automatically couples a power supply voltage to the biasing wells. The power supply voltage may be obtained internally to the integrated circuit.

Abstract: A method and system of voltage compensated integrated circuits. Operating characteristics of integrated circuitry are enhanced by application of voltage compensation.

Abstract: An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either an external body bias voltage or a power supply voltage to biasing wells. A first pad for coupling with a first externally disposed pin can optionally be provided. The first pad is for receiving an externally applied body bias voltage. Circuitry for producing a body bias voltage can be coupled to the first pad for coupling a body bias voltage to a plurality of biasing wells disposed on the integrated circuit device. If an externally applied body bias voltage is not provided, the resistive structure automatically couples a power supply voltage to the biasing wells. The power supply voltage may be obtained internally to the integrated circuit.

Abstract: A drive frequency source with two selectable output frequencies connected to two charge pump arrays. A first array of basic charge pump units is connected to the first output frequency and a second array of basic charge pump units is connected to the output frequency. One or more of the basic charge pump units making up the aforementioned first and second charge pump arrays has an enable input allowing its output current contribution to be added or subtracted from the total array output. The output of the first array is coupled to a P-type substrate and the output of the second array is coupled to an N-well residing in the P-type substrate. A controller may be coupled to the drive frequency source for selecting the output frequencies, and an output monitor may be coupled between the array outputs and the controller to provide feedback.

Abstract: An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Abstract: An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Abstract: A fast light off flow-through ceramic substrate is provided that is particularly adapted for use as a catalytic converter. The substrate is formed from a body of ceramic material having axially opposing inlet and outlet ends for receiving and expelling the flow of automotive exhaust gas, respectively. The body contains a network of walls coated with a catalyst that define axially-oriented flow-through cell channels. The average thermal mass (ATM1) of a first axial region of the walls adjacent to the inlet end is at least 20% less than the average thermal mass (ATMTOT) of all of the walls. The lower average thermal mass of the walls in the first region advantageously shortens the light off time for the catalyst within the substrate to effectively neutralize automotive pollutants. The reduction of the average thermal mass in only the first axial region of the walls advantageously maintains the strength of the resulting body of ceramic material, and further increases the cool down time of the body.

Abstract: A stabilization component for substrate potential regulation for an integrated circuit device. A comparator is coupled to a charge pump to control the charge pump to drive a substrate potential. A stabilization component is coupled to the comparator and is operable to correct an over-charge of the substrate by shunting current from the substrate.

Abstract: An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Abstract: An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Abstract: An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Abstract: A method and system of temperature compensated integrated circuits. Operating characteristics of integrated circuitry are enhanced by application of temperature compensation.