Patents by Inventor Robert Fulton

Robert Fulton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7554312
    Abstract: According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: June 30, 2009
    Assignee: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Patent number: 7286839
    Abstract: A porting control routing (PCR) node (302) is adapted to efficiently route signaling messages associated with a mobile subscriber that has been either ported in to or out of a service provider's wireless communication network. The PCR node (302) includes both range- and exception based routing rule databases (348 and 346). These databases increase flexibility in allocating mobile identification numbers among multiple mobile service nodes. Furthermore, the association of a ported status indicator and related routing information with entries in the exception based database allows the PCR node (302) to more efficiently manage a service provider's mobile service resources.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: October 23, 2007
    Assignee: Tekelec
    Inventors: Thomas Matthew McCann, Raghavendra Gopala Rao, Robert Fulton West, Jr., Peter Joseph Marsico
  • Publication number: 20070193745
    Abstract: A substance and method for treating a subterranean formation using hydraulic fracturing. A non-metallic, substantially deformable, proppant particle is “elastically flexible” or “plastically compressible” and adapted for use at concentrations which will substantially create a partial monolayer.
    Type: Application
    Filed: February 22, 2006
    Publication date: August 23, 2007
    Inventors: Robert Fulton, Adolph Peskunowicz, Garnet Olson
  • Publication number: 20070039788
    Abstract: A braking system for a movable unit which travels along a cable includes a plate of conductive material extending from the cable to define a braking zone having a start and an end along at least a portion of the cable. There is a brake unit movable along the cable and positionable at the start of the braking zone. The brake unit has magnets positionable on opposite sides of the conductive material. The brake unit is engagable by the movable unit when the movable unit reaches the start of the braking zone to couple the two units together. The movable unit acts to push the brake unit through the braking zone such that movement of the magnets of the brake unit relative to the conductive material induces eddy currents in the conductive material to create a braking force between the brake unit and the plate of conductive material to brake the brake unit and the movable unit. In an alternative arrangement, the magnets are installed directly in the movable unit to eliminate the separate brake unit.
    Type: Application
    Filed: August 22, 2005
    Publication date: February 22, 2007
    Inventor: Robert Fulton
  • Patent number: 7157894
    Abstract: Start-up circuit for current mirror circuits to facilitate transition from a zero-current state to an operation state. The start-up circuit includes two sets of current control devices. A set is coupled to each leg of the current mirrored circuit to provide a bias on start-up. The current control devices are coupled together to mirror the current that continues during the operational state such that the start-up circuit in combination with the operating circuit do not draw more current in the operational state than the operating circuit would normally draw in the operational state.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: January 2, 2007
    Assignee: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Patent number: 7126798
    Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: October 24, 2006
    Assignee: Intel Corporation
    Inventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
  • Patent number: 7109810
    Abstract: Circuitry for controlling the oscillation frequency of an oscillator by using a digitally tunable on-chip capacitor bank. The capacitor bank includes a plurality of on-chip capacitors, each of which is independently selectable by a control signal for providing a selectable amount of capacitance to the oscillator to control the oscillator's oscillation frequency.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 19, 2006
    Assignee: Intel Corporation
    Inventors: Chinnugounder Senthilkumar, Robert Fulton, Tea Lee
  • Publication number: 20060150581
    Abstract: An apparatus and method manufactures biodegradable food dishes and the like using a slurry of food starch and limestone which is formed and heated in a press into a shape of a food dish or food container or the like. The formed dishes or containers are removed from the press and trimmed in a trimming station, after which a lamination station laminates a biodegradable film onto food contacting surfaces of the food dish or the like. An optional step of applying a wax coating to a rear surface of the food dish or the like is provided. The now completed food dish or food container is provided to a packaging apparatus for stacking and packaging.
    Type: Application
    Filed: January 11, 2005
    Publication date: July 13, 2006
    Inventors: Eric Wardle, Robert Fulton
  • Patent number: 7035239
    Abstract: A flexible routing node for re-directing signaling messages in a communications network is disclosed. Re-direction or re-routing of signaling message packets is accomplished through the use of a range or block-based database in conjunction with an exception-based database. The range-based routing instruction databases incorporates a data structure that maps ranges or blocks of mobile identification numbers (MINs) to a single destination network address, while the exceptions database stores any exceptions to these range or block-based rules. The pair of routing databases is implemented such that, when a signaling message is received that requires re-direction, the exception-based database is queried first. If a match is found in the exceptions database, the signaling message is modified using the returned routing instructions and transmitted into an associated communication network. If no match is found in the exception-based database, a default query is performed against the range-based database.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: April 25, 2006
    Assignee: Tekelec
    Inventors: Thomas Matthew McCann, Raghavendra Gopala Rao, Robert Fulton West, Jr.
  • Publication number: 20050269158
    Abstract: A system for suspending a structure from a tree comprising a collection of primary tension members interwoven to define a sleeve adapted to grip a portion of the tree, and at least one hanger assembly extending from the sleeve having an end connectable to the structure to be suspended. The suspension system accommodates different sizes of tree trunks and branches, and changes in diameter of the tree. The system of the present invention is mountable to a tree without damaging the tree or impeding its growth. The system accommodates the natural flexing of the tree due to wind while reliably retaining any supported structure suspended above the ground.
    Type: Application
    Filed: June 2, 2004
    Publication date: December 8, 2005
    Inventor: Robert Fulton
  • Publication number: 20050231272
    Abstract: According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to receive a first configuration signal at a gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; and a second transistor device to receive a first voltage potential at a gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value.
    Type: Application
    Filed: June 22, 2005
    Publication date: October 20, 2005
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Patent number: 6940163
    Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
  • Patent number: 6924692
    Abstract: According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to receive a first configuration signal at a gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; and a second transistor device to receive a first voltage potential at a gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: August 2, 2005
    Assignee: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Publication number: 20050003764
    Abstract: An apparatus, in some embodiments, includes a first circuit to monitor a current, a second circuit to produce a reference current, and a control circuit coupled to the first circuit and the second circuit. In operation, the control circuit processes a first signal received from the first circuit and a second signal received from the second circuit and provides a control signal to the circuit to control the current. A method, in some embodiments, includes generating a reference current, generating a first current in a circuit, generating a second current related to the first current, and reducing the first current when the second current is greater than the reference current.
    Type: Application
    Filed: June 18, 2003
    Publication date: January 6, 2005
    Inventors: Michael Piorun, Chinnugounder Senthilkumar, Robert Fulton, Kirupa Pushparai, Andrew Volk
  • Publication number: 20040268158
    Abstract: According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Publication number: 20040263240
    Abstract: According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to receive a first configuration signal at a gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; and a second transistor device to receive a first voltage potential at a gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Applicant: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
  • Patent number: 6836477
    Abstract: A flexible routing node for re-directing signaling messages in a communications network is disclosed. Re-direction or re-routing of signaling message packets is accomplished through the use of a range or block-based database in conjunction with an exception-based database. The range-based routing instruction databases incorporates a data structure that maps ranges or blocks of mobile identification numbers (MINs) to a single destination network address, while the exceptions database stores any exceptions to these range or block-based rules. The pair of routing databases is implemented such that, when a signaling message is received that requires re-direction, the exception-based database is queried first. If a match is found in the exceptions database, the signaling message is modified using the returned routing instructions and transmitted into an associated communication network. If no match is found in the exception-based database, a default query is performed against the range-based database.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: December 28, 2004
    Assignee: Tekelec
    Inventors: Robert Fulton West, Jr., Thomas Matthew McCann, Raghavendra Gopala Rao
  • Publication number: 20040240309
    Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.
    Type: Application
    Filed: July 12, 2004
    Publication date: December 2, 2004
    Inventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
  • Patent number: 6791428
    Abstract: A circuit for producing a reliable duty cycle for a low power oscillator. The circuit produces a square wave signal based on the differences between the oscillating output signal driven by a piezoelectric crystal and a phase shifted output signal. This circuit provides a quick start for a clock signal, generates a reliable fifty percent duty cycle and is better protected from common mode noise. This circuit can also be configured to be programmable to provide for an adjustable duty cycle.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: September 14, 2004
    Assignee: Intel Corporation
    Inventors: Chinnugounder Senthilkumar, Tea Lee, Robert Fulton, Andrew Volk, Harishankar Sridharan
  • Patent number: 6774735
    Abstract: A clock oscillator circuit that includes an inverting amplifier and a resonator configured to generate an oscillating signal. The clock oscillator includes a bias circuit having a relatively constant current source configured to create a bias voltage to bias the amplifier in an operating state that can sustain the oscillating signal. The inverting amplifier and the bias circuit are configured to operate in a low power state.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: August 10, 2004
    Assignee: Intel Corporation
    Inventors: Chinnugounder Senthilkumar, Tea Lee, Robert Fulton, Andrew M. Volk