Patents by Inventor Robert G. Meyer

Robert G. Meyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240082085
    Abstract: An overhead arm assembly for a patient support apparatus includes a user interface device. The user interface device has a support structure for supporting a personal digital assistant and a charging port for personal digital assistant.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Robert M. Zerhusen, Jonathan K. Moenter, Joshua L. Meyer, Robert D. Ross, John G. Byers, Matthew R. Knue
  • Patent number: 11307029
    Abstract: A method for analyzing a surface quality of a laminate part including the steps of creating a planned dimensioned representation of a laminate part desired to be built which includes a first surface having a first topography; placing fibers into locations for the laminate part desired to be built; and curing a resin associated with the placed fibers fabricating an as-built laminate part which includes a second surface having a second topography which corresponds to the first surface having the first topography. The method also includes aligning the first surface, the second surface and the locations of the fibers; determining a first elevation of a first point on the first surface and a second elevation of a second point on the second surface; and observing the first surface, the second surface and the locations of the fibers in alignment and the first elevation relative to the second elevation in analyzing the surface quality of the laminate part.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 19, 2022
    Assignee: THE BOEING COMPANY
    Inventors: Jeron D. Moore, Michael K. Louie, Luis A. Perla, Gagandeep Saini, Christopher W. Fay, Robert G. Meyer
  • Patent number: 11034100
    Abstract: A method and apparatus for forming a composite object. A first plurality of tows is laid up over a tool according to a first path. A second plurality of tows is laid up over the tool according to a second path. A first portion of the first plurality of tows runs non-parallel to a second portion of the second plurality of tows. First ends of the first portion of the first plurality of tows and second ends of the second portion of the second plurality of tows meet at a merge zone along the tool to form a ply of a composite laminate.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: June 15, 2021
    Assignee: The Boeing Company
    Inventors: Michael Kenneth-Que Louie, Jeron D. Moore, Gagandeep Saini, Luis A. Perla, Brice Aaron Johnson, Stewart James Ibbotson, Timothy D. Jackson, Robert G. Meyer, Robert Graham Albers
  • Patent number: 10974465
    Abstract: A method and system for forming a composite laminate. A layup plan is generated for laying up a plurality of plies having a plurality of merge zones, each ply of the plurality of plies having a corresponding merge zone at which ends of a first plurality of tows for each ply and ends of a second plurality of tows for each ply meet. The locations of the plurality of merge zones are offset relative to each other through a thickness of the composite laminate. The plurality of plies is then laid up according to the layup plan to form a composite laminate.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: April 13, 2021
    Assignee: The Boeing Company
    Inventors: Jeron D. Moore, Michael Kenneth-Que Louie, Gagandeep Saini, Luis A. Perla, Brice Aaron Johnson, Stewart James Ibbotson, Robert G. Meyer
  • Publication number: 20190389149
    Abstract: A method and system for forming a composite laminate. A layup plan is generated for laying up a plurality of plies having a plurality of merge zones, each ply of the plurality of plies having a corresponding merge zone at which ends of a first plurality of tows for each ply and ends of a second plurality of tows for each ply meet. The locations of the plurality of merge zones are offset relative to each other through a thickness of the composite laminate. The plurality of plies is then laid up according to the layup plan to form a composite laminate.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: Jeron D. Moore, Michael Kenneth-Que Louie, Gagandeep Saini, Luis A. Perla, Brice Aaron Johnson, Stewart James Ibbotson, Robert G. Meyer
  • Publication number: 20190389150
    Abstract: A method and apparatus for forming a composite object. A first plurality of tows is laid up over a tool according to a first path. A second plurality of tows is laid up over the tool according to a second path. A first portion of the first plurality of tows runs non-parallel to a second portion of the second plurality of tows. First ends of the first portion of the first plurality of tows and second ends of the second portion of the second plurality of tows meet at a merge zone along the tool to form a ply of a composite laminate.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: Michael Kenneth-Que Louie, Jeron D. Moore, Gagandeep Saini, Luis A. Perla, Brice Aaron Johnson, Stewart James Ibbotson, Timothy D. Jackson, Robert G. Meyer, Robert Graham Albers
  • Publication number: 20190301860
    Abstract: A method for analyzing a surface quality of a laminate part including the steps of creating a planned dimensioned representation of a laminate part desired to be built which includes a first surface having a first topography; placing fibers into locations for the laminate part desired to be built; and curing a resin associated with the placed fibers fabricating an as-built laminate part which includes a second surface having a second topography which corresponds to the first surface having the first topography. The method also includes aligning the first surface, the second surface and the locations of the fibers; determining a first elevation of a first point on the first surface and a second elevation of a second point on the second surface; and observing the first surface, the second surface and the locations of the fibers in alignment and the first elevation relative to the second elevation in analyzing the surface quality of the laminate part.
    Type: Application
    Filed: April 2, 2018
    Publication date: October 3, 2019
    Inventors: Jeron D. Moore, Michael K. Louie, Luis A. Perla, Gagandeep Saini, Christopher W. Fay, Robert G. Meyer
  • Patent number: 9669579
    Abstract: A method for forming a structural member and a structural member produced thereby includes positioning a first composite section and a second composite section within a tool. The tool has an inner surface and a wall intersection and is supported by a tool platform. The tool platform and a pressure platform are relatively movable between an open position and a closed position. The tool has a non-planar outer surface against which the member may be pressed. A composite splice member is positioned at least partially overlapping both the first composite section and the second composite section to form a joint in the composite structural member. The composite structural member is pressed against the non-planar outer surface of the tool by applying pressure to the joint from a pressure bladder. Heat is applied to the composite structural member at the joint to cure the composite splice member to the first composite section and the second composite section.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: June 6, 2017
    Assignee: THE BOEING COMPANY
    Inventors: William T. Kline, Charles J. Nelson, Thang D. Phung, Curtis M. Groth, Robert G. Meyer, Peter J. VanVoast, Charles Y. Hu, Geoffrey A. Butler, Dan D. Day, Thomas J. Kennedy, Luis A. Perla, Richard A. Ransom, Justin L. Holland, Erik Lund, Joseph F. Warren
  • Publication number: 20150004347
    Abstract: A method for forming a structural member and a structural member produced thereby includes positioning a first composite section and a second composite section within a tool. The tool has an inner surface and a wall intersection and is supported by a tool platform. The tool platform and a pressure platform are relatively movable between an open position and a closed position. The tool has a non-planar outer surface against which the member may be pressed. A composite splice member is positioned at least partially overlapping both the first composite section and the second composite section to form a joint in the composite structural member. The composite structural member is pressed against the non-planar outer surface of the tool by applying pressure to the joint from a pressure bladder. Heat is applied to the composite structural member at the joint to cure the composite splice member to the first composite section and the second composite section.
    Type: Application
    Filed: September 17, 2014
    Publication date: January 1, 2015
    Inventors: William T. Kline, Charles J. Nelson, Thang D. Phung, Curtis M. Groth, Robert G. Meyer, Peter J. VanVoast, Charles Y. Hu, Geoffrey A. Butler, Dan D. Day, Thomas J. Kennedy, Luis J. Perla, Richard A. Ransom, Justin L. Holland, Erik Lund, Joseph F. Warren
  • Patent number: 8878588
    Abstract: An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: November 4, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Robert G. Meyer, Joel D. Birkeland
  • Publication number: 20140210539
    Abstract: An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
    Type: Application
    Filed: April 1, 2014
    Publication date: July 31, 2014
    Applicant: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Robert G. Meyer, Joel D. Birkeland
  • Patent number: 8736344
    Abstract: Voltage controlled variable attenuators are described that are configured to be coupled to a transmission path to furnish variable attenuation of a signal, such as a radio frequency signal. In one or more implementations, the voltage controlled variable attenuator includes at least one transistor. The transistor has an open configuration for at least substantially preventing the flow of current through the transistor, and a closed configuration for at least partially allowing the flow of current through the transistor. The variable attenuator also includes a resistive component coupled to the transistor, and configured to couple to the transmission path. The resistive component is configured to at least partially mitigate non-linear effect when the transistor transitions from the open configuration to the closed configuration.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: May 27, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Joel D. Birkeland, Robert G. Meyer
  • Patent number: 8686780
    Abstract: An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: April 1, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Robert G. Meyer, Joel D. Birkeland
  • Publication number: 20130214841
    Abstract: An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
    Type: Application
    Filed: February 13, 2013
    Publication date: August 22, 2013
    Applicant: Maxim Integrated Products, Inc.
    Inventors: Robert G. Meyer, Joel D. Birkeland
  • Patent number: 8390359
    Abstract: An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: March 5, 2013
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Robert G Meyer, Joel D Birkeland
  • Patent number: 8358166
    Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: January 22, 2013
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Robert G. Meyer
  • Publication number: 20110285458
    Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.
    Type: Application
    Filed: August 5, 2011
    Publication date: November 24, 2011
    Inventor: Robert G. Meyer
  • Patent number: 7994840
    Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: August 9, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Robert G. Meyer
  • Publication number: 20110156809
    Abstract: An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
    Type: Application
    Filed: April 30, 2010
    Publication date: June 30, 2011
    Applicant: Maxim Integrated Products, Inc.
    Inventors: Robert G. Meyer, Joel D. Birkeland
  • Publication number: 20100116938
    Abstract: A composite structural member includes first and second composite sections spliced together by an overlapping composite splice member.
    Type: Application
    Filed: November 13, 2008
    Publication date: May 13, 2010
    Inventors: William T. Kline, Charles J. Nelson, Thang D. Phung, Curtis M. Groth, Robert G. Meyer, Peter J. VanVoast, Charles Y. Hu, Geoffrey A. Butler, Dan D. Day, Thomas J. Kennedy, Luis A. Perla, Richard A. Ransom, Justin L. Holland, Erik Lund, Joseph F. Warren