Patents by Inventor Robert G. Meyer

Robert G. Meyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090284300
    Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.
    Type: Application
    Filed: May 19, 2008
    Publication date: November 19, 2009
    Inventor: Robert G. Meyer
  • Patent number: 7518846
    Abstract: An ESD protection device has a multi-stage RC-timed architecture to turn on quickly and sink current for a relatively long time period. For example, a high power voltage clamp and a low power voltage clamp coupled in parallel to protect internal circuitry of an integrated circuit. The high power clamp turns on during the first few microseconds of an ESD event, and sinks current for a brief period of time, during which the low power clamp turns on as well. Once the high power clamp turns off, the low power clamp continues to sink current until a safe level is reached.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: April 14, 2009
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Robert G. Meyer
  • Patent number: 6307442
    Abstract: A tunable electronic filter circuit is provided including an input terminal and an output terminal connected to the input terminal with a node therebetween. An inductor, a variable capacitor, and a variable resistor are connected between the node and ground. Coupled to the variable capacitor and the variable resistor is a feedback control circuit. The feedback control circuit is operable to tune the variable capacitor in order to set a predetermined frequency, or center frequency, of the electronic filter circuit. The feedback control circuit is further operable to tune the variable resistor in order to calibrate a quality factor of the electronic filter circuit. In use when an input signal is applied to the input terminal, the electronic filter circuit passes an output signal to the output terminal. Such output signal includes components of the input signal within a predetermined frequency bandwidth set by the predetermined frequency and filters out other components of the input signal.
    Type: Grant
    Filed: May 17, 1999
    Date of Patent: October 23, 2001
    Assignee: Maxim Integrated Products
    Inventors: Robert G. Meyer, Madhu Avasarala
  • Patent number: 5107224
    Abstract: In accordance with the teachings of this invention, a novel wide-band, DC coupled, single-ended voltage-to-current converter and gain control circuit is provided. Of importance, the circuit of this invention is designed to receive an input signal referenced to ground such that for zero input current, zero output current is provided. A replica bias circuit is used which allows the output signal to be a function of the input signal without offsets introduced by bias currents used throughout the circuit.
    Type: Grant
    Filed: February 28, 1989
    Date of Patent: April 21, 1992
    Assignee: North American Philips Corporation
    Inventor: Robert G. Meyer
  • Patent number: 5049764
    Abstract: An integrated circuit (10, 22) contains an active bypass (36) that inhibits high-frequency supply-voltage variations caused by interaction of the circuitry elements (28) with the parasitic inductances (L.sub.HE, L.sub.HP, L.sub.LP, and L.sub.LE) associated with the power supply lines (16.sub.H /24.sub.H /26.sub.H /32.sub.H and 16.sub.L /24.sub.L /26.sub.L /32.sub.L) for the circuit. The bypass centers around a transistor (Q.sub.BP) coupled between the supply lines. An activation circuit (38) provides the transistor with a control signal (V.sub.C) to activate the transistor. A sensing capacitor (C.sub.S) provides a capacitive action between the transistor control electrode and one of the supply lines.
    Type: Grant
    Filed: January 25, 1990
    Date of Patent: September 17, 1991
    Assignee: North American Philips Corporation, Signetics Div.
    Inventor: Robert G. Meyer
  • Patent number: 4999586
    Abstract: A wideband amplifier is configured to allow sophisticated low voltage signal processing in a low-cost, high frequency integrated circuit driver. The integrated circuit driver provides output currents to drive high voltage discrete power transistors in such a way as to achieve maximum frequency response from the low-cost discrete transistors. The discrete power transistors in turn provide an output voltage suitable for driving, for example, a CRT display. The transconductance amplifiers, video processing circuitry, current multipliers, and summers are formed in an integrated circuit device utilizing readily available processing and circuit design techniques, and a relatively small number of discrete low power components, including pull-up and pull-down transistors which are chosen to have a fairly high frequency of unity current gain (F.sub.t), yet which are readily available at a very low cost.
    Type: Grant
    Filed: May 26, 1988
    Date of Patent: March 12, 1991
    Assignees: North American Philips Corp, Hewlett-Packard Co.
    Inventors: Robert G. Meyer, Jeffrey D. Scotten
  • Patent number: 4600898
    Abstract: A one-pin crystal oscillator 20 is designed to be used as a clock generator for digital integrated circuits. Unlike the prior art, this oscillator requires only one package pin to connect the crystal as opposed to the usual two pin requirement and, except for the crystal, can be completely fabricated on a chip so as to require no other external components.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: July 15, 1986
    Assignee: The Regents of the University of California
    Inventors: Joseph T. Santos, Robert G. Meyer