Abstract: A micro electromechanical switch has a guidepost formed upon a substrate. A signal transmission line is formed on the substrate, with the signal transmission line having a gap and forming an open circuit. The switch further includes a switch body having a via opening formed therein, with the switch body being movably disposed along an length defined by the guide post. The guidepost is partially surrounded by the via opening.

Abstract: An integrated semiconducting device comprises a semiconducting substrate, a plurality of grounding strips disposed above the substrate in a lower metal level of the semiconducting device, an inductor positioned in an upper metal level of the semiconducting device, and a plurality of conducting vias connected to and extending away from the grounding strips towards the inductor. The inductor, conducting via, ground strips structure forms a Faraday cage that acts as a shield against electromagnetic radiation. The number and placement of the conductive vias are adjustable and can be optimized based on the relative importance of maximizing the quality factor Q of the inductor or minimizing the capacitance between the inductor and ground.

Abstract: The magnetic field of an inductor is decreased by the presence of one or more single loop windings positioned in proximity to the inductor. The single loop windings have open circuits that are selectively closed to magnetically couple the single loop windings to the inductor. A switched inductor/varactor tuning circuit is formed by connecting a varactor to the inductor.

Abstract: An electronic cockpit display of traffic information in a pilot's own aircraft, comprising: a traffic display out to a distance from the own aircraft at a periphery of the display set by an adjustable scale; and a range indicator display representing a selected physical distance from the own aircraft, the range indicator moving in a selectable range ring mode to maintain the selected distance from the own aircraft represented by the indicator as the adjustable scale changes. The range indicator display optionally may be selectively operable in an alternative half-scale range ring mode, in which the range indicator remains at the halfway position on the display as the adjustable scale changes, and in which the physical distance from the own aircraft represented by the indicator varies with the scale adjustment. Range monitoring may be provided using a range ring as the range indicator.

Abstract: A means for fabrication of solenoidal inductors integrated in a semiconductor chip is provided. The solenoidal coil is partially embedded in a deep well etched into the chip substrate. The non-embedded part of the coil is fabricated as part of the BEOL metallization layers. This allows for a large cross-sectional area of the solenoid turns, thus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The fabrication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric followed by fabrication of the part of the coil that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric and planarization of same by CMP.

Abstract: A system for graphically displaying on a cockpit display an indication of closure (i.e. a “closure indictor”) with a selected target aircraft. In a preferred embodiment of the invention, the system only displays a closure indicator if: (1) the selected target aircraft is within a predetermined monitoring zone; and (2) the track of the selected target aircraft is within a pre-determined variation angle of the track of the Own Ship aircraft. If the rate of closure between the selected target aircraft and the Own Ship aircraft is within a predetermined range of values, the closure indicator includes a closing/receding indicia (such as an upwardly or downwardly directed arrow) that indicates whether the Own Ship aircraft is closing in on or receding from the selected target aircraft. The system preferably removes the closure indicator from display when the Own Ship aircraft or the selected target aircraft ceases to be airborne.

Abstract: A system and method for filtering various targets (such as ground vehicles, stationary objects, and aircraft) from display on a display screen within the cockpit of an “Own Ship” aircraft. The system and method withhold from display any non-exempt targets that have an altitude that is either: (1) greater than an upper-threshold altitude; or (2) less than a lower-threshold altitude. The upper-threshold altitude and the lower-threshold altitude may be set to user-specified, customized values as desired to accommodate current flying conditions. In addition, the system and method may also be configured to operate in a plurality of operating modes, each of which features a different upper threshold altitude/lower threshold altitude combination. The system and method are preferably configured to reset certain threshold altitudes to pre-defined default altitudes in response to the aircraft landing.

Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.

Abstract: A transistor array including a plurality of transistors. Each transistor includes an emitter. An emitter region contact overlies each emitter region. At least one base region underlies each emitter region and is common to a plurality of transistors in the array. At least one base contact overlies the at least one base region and is associated with each transistor. A plurality of the base contacts are common to at least two transistors in the array. At least one collector reach through is associated with each transistor. A collector reach through contact overlies each collector reach through. A buried layer subcollector region of electrically conducting material electrically connects the collector reach through region to the collector pedestal region of each transistor.

Abstract: A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices.

Abstract: An integrated semiconducting device comprises a semiconducting substrate, a plurality of grounding strips disposed above the substrate in a lower metal level of the semiconducting device, an inductor positioned in an upper metal level of the semiconducting device, and a plurality of conducting vias connected to and extending away from the grounding strips towards the inductor. The inductor, conducting via, ground strips structure forms a Faraday cage that acts as a shield against electromagnetic radiation. The number and placement of the conductive vias are adjustable and can be optimized based on the relative importance of maximizing the quality factor Q of the inductor or minimizing the capacitance between the inductor and ground.

Abstract: High frequency performance of transistor designs is enhanced and manufacturing yield improved by removing and reducing sources of parasitic capacitance through combinations of processes from different technologies. After formation of collector, base and emitter regions on a substrate and attachment of a second substrate, the original substrate is wholly or partially removed, the inactive collector area is removed or rendered semi-insulating and wiring and contacts are made from the original back side of the chip. Dielectric material used in the manufacturing process can be removed to further reduce capacitance. The high frequency transistors can be bonded to CMOS chips or wafers to form BICMOS chips.

Abstract: A micro electromechanical switch has a guidepost formed upon a substrate. A signal transmission line is formed on the substrate, with the signal transmission line having a gap and forming an open circuit. The switch further includes a switch body having a via opening formed therein, with the switch body being movably disposed along an length defined by the guide post. The guidepost is partially surrounded by the via opening.

Abstract: An electronic cockpit display of traffic information in a pilot's own aircraft, comprising: a traffic display out to a distance from the own aircraft at a periphery of the display set by an adjustable scale; and a range indicator display representing a selected physical distance from the own aircraft, the range indicator moving in a selectable range ring mode to maintain the selected distance from the own aircraft represented by the indicator as the adjustable scale changes. The range indicator display optionally may be selectively operable in an alternative half-scale range ring mode, in which the range indicator remains at the halfway position on the display as the adjustable scale changes, and in which the physical distance from the own aircraft represented by the indicator varies with the scale adjustment. Range monitoring may be provided using a range ring as the range indicator.

Abstract: A transistor array including a plurality of transistors. Each transistor includes an emitter. An emitter region contact overlies each emitter region. At least one base region underlies each emitter region and is common to a plurality of transistors in the array. At least one base contact overlies the at least one base region and is associated with each transistor. A plurality of the base contacts are common to at least two transistors in the array. At least one collector reach through is associated with each transistor. A collector reach through contact overlies each collector reach through. A buried layer subcollector region of electrically conducting material electrically connects the collector reach through region to the collector pedestal region of each transistor.

Abstract: A transistor array including a plurality of transistors. Each transistor includes an emitter. An emitter region contact overlies each emitter region. At least one base region underlies each emitter region and is common to a plurality of transistors in the array. At least one base contact overlies the at least one base region and is associated with each transistor. A plurality of the base contacts are common to at least two transistors in the array. At least one collector reach through is associated with each transistor. A collector reach through contact overlies each collector reach through. A buried layer subcollector region of electrically conducting material electrically connects the collector reach through region to the collector pedestal region of each transistor.

Abstract: A low noise, high frequency solid state diode is provided from a plurality of unit diode cells which are interconnected in parallel. Each of the unit diode cells forms an element of an array having rows and columns of unit diode cells. The diode cells include a base region of polysilicon, forming an anode, and an active cathode region which forms a diode junction with the anode. A plurality of overlapping subcollector regions interconnect the cathode regions, to provide a single, continuous collector for the diode arrays. The base region has a minimum perimeter to area ratio which reduces the resistance of each active diode region. A plurality of cathode contacts are connected to the subcollector through a respective reach region of highly doped semiconductor material. One or more metalization layers connect the cathode regions together, and the anodes of the base regions together. By controlling the size and shape of the base region of polysilicon, the series resistance of the resulting diode is minimized.