Abstract: Test circuitry is included in a PROM memory for detecting shorts between bit lines and word lines and shorts or leaks in a memory cell. The circuitry enables a selected positive voltage to be applied across all memory cells in the memory so that the existence of leaky memory cells or shorts in the memory can be detected during testing. The test circuitry has no appreciable effect on the memory during normal operation of the memory.

Abstract: A circuit constructed in accordance with this invention includes means for asynchronously forcing a flip-flop (70) or a register to a programmable logical state in response to an initialization input signal (I). In one embodiment, a D-type flip-flop (70) is provided having data input terminal (71), a clock input terminal (77), a data output terminal (103), an initialization input terminal (41), and a programming input terminal (11). When an initialization input signal I is received, a predefined output signal is immediately placed on the data output terminal (103). The predefined output signal is defined by the status of a fuse (13), which is opened, if desired, via the programming input terminal (11). When an initialization input signal is not received, the flip-flop (70) operates as a normal D-type flip-flop.

Abstract: Circuitry is provided for testing fusible link arrays for short circuits around the fusible links. The resistance of each corresponding link in each of the four quandrants in the array is compared with the resistance of an array of reference fusible links to detect the presence or absence of a short circuit.

Abstract: A unique programming circuit, suitable for use with programmable read-only memories (PROM), or other circuits utilizing programmable fuses, is provided which overcomes several distinct disadvantages of prior art programming circuits. The programming circuit of this invention includes a Darlington pair of programming transistors which allows only a single programming transistor to be made large in order to carry the large programming current, and only a single high current drive signal need be applied to the single programming transistor, thereby minimizing power consumption and integrated circuit die area.

Abstract: Test circuitry is included in a PROM memory for detecting shorts between bit lines and word lines and shorts or leaks in a memory cell. The circuitry enables a selected positive voltage to be applied across all memory cells in the memory so that the existance of leaky memory cells or shorts in the memory can be detected during testing. The test circuitry has no appreciable effect on the memory during normal operation of the memory.