Patents by Inventor Robert J. McMorrow

Robert J. McMorrow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230275363
    Abstract: Register banks are used to allow for fast beam switching in a phased array system. Each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.
    Type: Application
    Filed: January 27, 2023
    Publication date: August 31, 2023
    Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
  • Patent number: 11652267
    Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: May 16, 2023
    Assignee: Anokiwave, Inc.
    Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
  • Patent number: 11637371
    Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: April 25, 2023
    Assignee: Anokiwave, Inc.
    Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
  • Publication number: 20220013922
    Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
  • Publication number: 20210344099
    Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.
    Type: Application
    Filed: July 7, 2021
    Publication date: November 4, 2021
    Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
  • Publication number: 20210328345
    Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
  • Patent number: 11133603
    Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: September 28, 2021
    Assignee: Anokiwave, Inc.
    Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
  • Patent number: 11081792
    Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: August 3, 2021
    Assignee: Anokiwave, Inc.
    Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
  • Patent number: 11063336
    Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: July 13, 2021
    Assignee: Anokiwave, Inc.
    Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
  • Publication number: 20210075125
    Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 11, 2021
    Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
  • Publication number: 20210043996
    Abstract: An integrated circuit system has a die with first and second sides, and contains high frequency circuitry operating at mm-wave frequencies. The system also has a plurality of interfaces (on the first side) in electrical communication with the high frequency circuitry, and a heat sink having a bottom surface with a first region and an aperture region. The first region is in physical and conductive contact with the die, while the aperture region forms a concavity with an inner concave surface that is spaced from the die.
    Type: Application
    Filed: October 12, 2020
    Publication date: February 11, 2021
    Inventors: Gaurav Menon, Jonathan P. Comeau, Andrew M. Street, Scott Mitchell, Robert J. McMorrow, Christopher Jones
  • Patent number: 10862222
    Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be preprogrammed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: December 8, 2020
    Assignee: Anokiwave, Inc.
    Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. Mcmorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
  • Patent number: 10833391
    Abstract: An integrated circuit system has a die with first and second sides, and contains high frequency circuitry operating at mm-wave frequencies. The system also has a plurality of interfaces (on the first side) in electrical communication with the high frequency circuitry, and a heat sink having a bottom surface with a first region and an aperture region. The first region is in physical and conductive contact with the die, while the aperture region forms a concavity with an inner concave surface that is spaced from the die.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: November 10, 2020
    Assignee: ANOKIWAVE, INC.
    Inventors: Gaurav Menon, Jonathan P. Comeau, Andrew Street, Scott Mitchell, Robert J. McMorrow, Christopher Jones
  • Publication number: 20200350677
    Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits.
    Type: Application
    Filed: March 7, 2019
    Publication date: November 5, 2020
    Inventors: Vipul Jain, Scott Humphreys, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Robert J. McMorrow, Jonathan P. Comeau, Nitin Jain, Gaurav Menon
  • Patent number: 10777888
    Abstract: A beamforming integrated circuit system for use in a phased array has a microchip with RF circuitry, and a plurality of (on chip) interfaces electrically connected with the RF circuitry. The plurality of interfaces includes a signal interface, a first ground interface, and a second ground interface. The signal interface is configured to communicate an RF signal, and both the first and second ground interfaces are adjacent to the signal interface. The system also has a material ring circumscribing the plurality of interfaces, and at least one RF ground path coupled with the material ring.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: September 15, 2020
    Assignee: ANOKIWAVE, INC.
    Inventors: Vipul Jain, Noyan Kinayman, Robert J. McMorrow, Kristian N. Madsen, Shamsun Nahar, Nitin Jain
  • Patent number: 10742288
    Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: August 11, 2020
    Assignee: ANOKIWAVE, INC.
    Inventors: Robert J. McMorrow, Vipul Jain, Wade C. Allen, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Nitin Jain
  • Patent number: 10587044
    Abstract: A beamforming integrated circuit system for use in a phased array has a microchip with RF circuitry, a bottom surface, and a plurality of interfaces electrically connected with the RF circuitry. The plurality of interfaces includes a plurality of static interfaces and a plurality of RF interfaces. The plurality of static interfaces are on the bottom surface of the microchip and adjacent to each other. The plurality of RF interfaces are also on the bottom surface of the microchip, but radially outward of the plurality of static interfaces. The microchip is configured to be flip chip mounted.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: March 10, 2020
    Assignee: Anokiwave, Inc.
    Inventors: Vipul Jain, Noyan Kinayman, Robert J. McMorrow, Kristian N. Madsen, Shamsun Nahar, Nitin Jain
  • Publication number: 20190312359
    Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.
    Type: Application
    Filed: June 10, 2019
    Publication date: October 10, 2019
    Inventors: Kristian N. MADSEN, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
  • Publication number: 20190312330
    Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.
    Type: Application
    Filed: April 4, 2019
    Publication date: October 10, 2019
    Inventors: Kristian N. Madsen, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain, Jonathan P. Comeau, Shmuel Ravid
  • Patent number: 10382010
    Abstract: A circuit for attenuating a signal has an input configured to receive an input signal, an output configured to transmit an output signal, a first attenuation path (having a first active circuit device) between the input and the output, and a second attenuation path between the input and the output. The circuit also has an operational amplifier that, like most operational amplifiers, has a first op-amp input, a second op-amp input, and an op-amp output. In addition, the circuit has a voltage control device coupled with the first op-amp input, and a second active circuit device having a first active terminal coupled with the second op-amp input. A feedback loop is coupled between the op-amp output and a second active terminal of the second active circuit device. Moreover, the op-amp output also is coupled with the first active circuit device.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: August 13, 2019
    Assignee: Anokiwave, Inc.
    Inventors: Kristian N. Madsen, Robert J. McMorrow