Patents by Inventor Robert J. Royer

Robert J. Royer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6917992
    Abstract: A method is described that involves sending a second command over a Serial ATA interface to a device before the device is able to execute a first command that was previously sent to the Serial ATA interface. In a further embodiment of the first command is tagged with a first reference number. In an even further embodiment of the method the second command is tagged with a second reference number.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: July 12, 2005
    Assignee: Intel Corporation
    Inventors: Knut S. Grimsrud, Amber D. Huffman, Robert J. Royer, Jr.
  • Patent number: 6839812
    Abstract: Briefly, in accordance with an embodiment of the invention, a method and system to store cache metadata from a higher latency media in a lower latency media is provided.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: January 4, 2005
    Assignee: Intel Corporation
    Inventors: Robert J. Royer, Jr., Jeanna N. Matthews
  • Publication number: 20040268026
    Abstract: An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver.
    Type: Application
    Filed: June 27, 2003
    Publication date: December 30, 2004
    Applicant: Intel Corporation
    Inventors: Robert J. Royer, Richard L. Coulson
  • Publication number: 20040225826
    Abstract: A nonvolatile memory module. The module includes a nonvolatile memory array and a connector allowing the array to make connection with a host system. A memory controller operates to either create an image of a nonvolatile intermediate memory in response to an imaging request or populate a nonvolatile intermediate memory in response to an installation request.
    Type: Application
    Filed: June 4, 2004
    Publication date: November 11, 2004
    Applicant: Intel Corporation (a Delaware corporation)
    Inventors: Robert J. Royer, John I. Garney
  • Publication number: 20040215923
    Abstract: In one embodiment of the present invention, a method includes observing disk requests for a drive associated with a memory device; and mapping the memory device based on observing the disk requests.
    Type: Application
    Filed: April 22, 2003
    Publication date: October 28, 2004
    Inventor: Robert J. Royer
  • Publication number: 20040073719
    Abstract: A method is described that involves sending a second command over a Serial ATA interface to a device before the device is able to execute a first command that was previously sent to the Serial ATA interface. In a further embodiment of the first command is tagged with a first reference number. In an even further embodiment of the method the second command is tagged with a second reference number.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 15, 2004
    Inventors: Knut S. Grimsrud, Amber D. Huffman, Robert J. Royer
  • Publication number: 20030188123
    Abstract: Briefly, in accordance with an embodiment of the invention, a method to generate cache data is provided, wherein the method includes identifying access data transmitted from a storage device during execution of a predetermined software program and generating cache data using the identified access data.
    Type: Application
    Filed: April 1, 2002
    Publication date: October 2, 2003
    Inventors: Robert J. Royer, Knut S. Grimsrud
  • Publication number: 20030120868
    Abstract: Briefly, in accordance with an embodiment of the invention, a method and system to store cache metadata from a higher latency media in a lower latency media is provided.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Inventors: Robert J. Royer, Jeanna N. Matthews
  • Publication number: 20030061428
    Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 27, 2003
    Applicant: Intel Corporation
    Inventors: John I. Garney, Robert J. Royer
  • Publication number: 20030061436
    Abstract: A nonvolatile memory module. The module includes a nonvolatile memory array and a connector allowing the array to make connection with a host system. A memory controller operates to either create an image of a nonvolatile intermediate memory in response to an imaging request or populate a nonvolatile intermediate memory in response to an installation request.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 27, 2003
    Applicant: Intel Corporation
    Inventors: Robert J. Royer, John I. Garney
  • Publication number: 20030005223
    Abstract: A system and method to reduce the time for system initializations is disclosed. In accordance with the invention, data accessed during a system initialization is loaded into a non-volatile cache and is pinned to prevent eviction. By pinning data into the cache, the data required for system initialization is pre-loaded into the cache on a system reboot, thereby eliminating the need to access a disk.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 2, 2003
    Inventors: Richard L. Coulson, John I. Garney, Jeanna N. Matthews, Robert J. Royer
  • Publication number: 20030005219
    Abstract: An apparatus and method to reduce the initialization time of a system is disclosed. In one embodiment, the invention stores metadata for data in a cache memory in a partitioned section of a non-volatile storage media. This allows multiple metadata entries to be read in one operation, thereby improving system performance.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Robert J. Royer, Knut S. Grimsrud, Richard L. Coulson
  • Patent number: 6493806
    Abstract: A system and method for generating a transportable physical level data block trace for a computer system. The method comprises capturing a first physical level data block trace on a first computer system, then performing a reverse file system lookup to generate a logical representation of that trace. That logical representation may be delivered to a second computer system, which may perform a file system lookup to convert the logical representation to a second physical level data block trace for a sequence of disk block accesses resulting from executing an application on the second computer system.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: December 10, 2002
    Assignee: Intel Corporation
    Inventors: Robert J. Royer, Jr., Knut S. Grimsrud
  • Patent number: 6434663
    Abstract: An apparatus is equipped with a caching function of a device driver, including a pre-fetch function that selective pre-fetches data stored in disk blocks to facilitate operation with a file system having file clusters with a cluster size greater than an underlying operating system's memory page size. The apparatus is further equipped with a disk block allocation optimization function to generate a new set of disk blocks to reallocate disk blocks for file system clusters accessed by a sequence of file accesses of interest to improve the overall access time for these file system clusters. The disk block allocation optimization function is further equipped to account for the selective pre-fetches and caching to be performed to accommodate said file system.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: August 13, 2002
    Assignee: Intel Corporation
    Inventors: Knut S. Grimsrud, Robert J. Royer, Jr.