Abstract: Method and apparatus for tracking thread stacks during a trace of a computer program. Hardware assistance mechanisms allow a processor to autonomically maintain a thread work area for each thread where a call stack is stored. An operating system informs the processor of the size of the data area to allocate to a particular thread work area. When a trace of a computer program is to be performed, trace software, informs the processor to begin maintaining thread call stack information in the thread work area. For each thread in the computer program execution, the processor maintains a work area having a size that is determined based on the size communicated by the operating system. The processor contains microcode to cause the processor to automatically store thread tracking information in the work areas designated by control registers of the processor when a control bit is set.

Abstract: A method and apparatus for automatically performing regression processing on trace data are provided. With the apparatus and method, call tree data structures are generated for two or more executions of two or more builds of a computer program. The apparatus and method perform a “tree-minimization” operation on each set of call tree data structures for each of the builds to generate minimized call tree data structures for each build of the computer program. The minimized call tree data structures are then subtracted from one another to generate a subtracted minimized call tree data structure. From this subtracted minimized call tree data structure, the portions of the computer program that are different from build to build and which appreciably and consistently affect the difference in execution of the computer program from build to build may be identified.

Abstract: A method and system for determining the memory utilization of a heap are provided. With the method and system, object allocations and optionally, possible memory freeing events are used to initiate a mark-and-count operation. The mark-and-count operation marks the live objects and maintains a running count of their memory bytes allocated to the live objects, referred to as a live count. The execution of the mark-and-count operation may be dependent upon various criteria including thresholds, functions of the live count, peak live counts, number of memory bytes allocated since a previous mark-and-count operation was performed, and the like. In addition to the live count, a total number of bytes allocated to objects may be maintained in order to obtain information regarding the heap memory utilization.

Abstract: A method, an apparatus, and a computer program product in a data processing system are presented for using hardware assistance for gathering performance information that significantly reduces the overhead in gathering such information. Performance indicators are associated with instructions or memory locations, and processing of the performance indicators enables counting of events associated with execution of those instructions or events associated with accesses to those memory locations. The performance information that has been dynamically gathered from the assisting hardware is available to the software application during runtime in order to autonomically affect the behavior of the software application, particularly to enhance its performance. For example, the counted events may be used to autonomically collecting statistical information about the ability of a software application to successfully acquire a semaphore.

Abstract: A method, apparatus, and computer instructions in a data processing system for processing instructions and monitoring accesses to memory location ranges. An instruction for execution is identified. A determination is made as to whether the instruction is within a contiguous range of instructions. Execution information relating to the instruction is identified if the instruction is within the contiguous range of instructions. With memory location accesses, an access to a memory location is identified. A determination of whether the memory location is within a contiguous range of memory locations is made. Access information is identified if the memory location is within the contiguous range of memory locations.

Abstract: A method, apparatus, and computer instructions in a processor for associating a data type with a memory location. The type is associated with a location by means of metadata that is generated and manipulated by hardware instructions that are typically generated by a compiler as it generates the other instructions that comprise the machine code version of a program. A determination is made as to whether a data value about to be stored is of the required data type for that location. The hardware indicates an error condition if the types do not match.

Abstract: A method, apparatus, and computer instructions in a data processing system for processing instructions are provided. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled. Functionality may be provided in the performance monitoring application for initiating the measurement of secondary metrics with regard to identified instructions, data addresses, ranges of identified instructions, or ranges of identified data addresses, based on counter values for primary metrics. Thus, for example, when a primary metric counter, or a combination of primary metric counters, meets or exceeds a predetermined threshold value, an interrupt may be generated. In response to receiving the interrupt, counters associated with the measuring of secondary metrics of a range of instructions/data addresses may be initiated.

Abstract: A method, apparatus and computer instructions for hardware assist for autonomically patching code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.

Abstract: A method, apparatus, and computer instructions for presenting coverage data relating to data access occurring during execution of code. The coverage data containing data access indicators associated with memory locations is obtained. The data access indicators that have been set by a processor in the data processing system in response to access of the memory locations during execution of the code by the processor are identified to form set data access indicators. Each set instruction access indicator is associated with a portion of the memory locations allocated for the code. A presentation for coverage data is generated, wherein the set data access indicators are identified in the presentation.

Abstract: A method, an apparatus, and a computer program product in a data processing system are presented for using hardware assistance for gathering performance information that significantly reduces the overhead in gathering such information. Performance indicators are associated with instructions or memory locations, and processing of the performance indicators enables counting of events associated with execution of those instructions or events associated with accesses to those memory locations. The performance information that has been dynamically gathered from the assisting hardware is available to the software application during runtime in order to autonomically affect the behavior of the software application, particularly to enhance its performance. For example, the counted events may be used to autonomically collecting statistical information about the ability of a software application to successfully acquire a semaphore.

Abstract: A method, apparatus and computer instructions for hardware assist for autonomically patching code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.

Abstract: A method, apparatus, and computer instructions in a data processing system for processing instructions. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled.

Abstract: A method, apparatus, and computer instructions in a data processing system for processing instructions are provided. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled. Functionality may be provided in the performance monitoring application for initiating the measurement of secondary metrics with regard to identified instructions, data addresses, ranges of identified instructions, or ranges of identified data addresses, based on counter values for primary metrics. Thus, for example, when a primary metric counter, or a combination of primary metric counters, meets or exceeds a predetermined threshold value, an interrupt may be generated. In response to receiving the interrupt, counters associated with the measuring of secondary metrics of a range of instructions/data addresses may be initiated.

Abstract: A method, apparatus, and computer instructions in a data processing system for processing instructions. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled.

Abstract: A method, apparatus, and computer instructions in a processor for associating a data type with a memory location. The type is associated with a location by means of metadata that is generated and manipulated by hardware instructions that are typically generated by a compiler as it generates the other instructions that comprise the machine code version of a program. A determination is made as to whether a data value about to be stored is of the required data type for that location. The hardware indicates an error condition if the types do not match.

Abstract: A method, apparatus, and computer instructions in a data processing system for processing instructions and monitoring accesses to memory location ranges. An instruction for execution is identified. A determination is made as to whether the instruction is within a contiguous range of instructions. Execution information relating to the instruction is identified if the instruction is within the contiguous range of instructions. With memory location accesses, an access to a memory location is identified. A determination of whether the memory location is within a contiguous range of memory locations is made. Access information is identified if the memory location is within the contiguous range of memory locations.

Abstract: A method is presented for enabling application-level software to normalize processor clock values within a multiprocessor data processing system. A first processor number associated with a first processor is obtained such that the first processor executes one or more instructions for obtaining the first processor number. Subsequent to obtaining the first processor number, a processor clock value is obtained such that the processor clock value is associated with a processor that executes one or more instructions for obtaining the processor clock value. Subsequent to obtaining the processor clock value, a second processor number associated with a second processor is obtained such that the second processor executes one or more instructions for obtaining the second processor number. If the first processor number and the second processor number are equal, then the first processor number is used to retrieve a compensation value for a normalization operation on the processor clock value.

Abstract: A method, apparatus, and computer instructions in a processor for checking assertions. A determination by the processor is made as to whether metadata for an assertion is associated with the memory location, in response to detecting a change in data in a memory location. The data to the assertion is compared by the processor, in response to the metadata being associated with the memory location. An error is generated by the processor if the assertion is invalid, with respect to the data. The processor checks the assertions for validity.

Abstract: A method, system, apparatus, and computer program product is presented for tracing operations. A set of related methodologies can be used within instruction tracing software, such as a tracing program, to reduce its tendency to generate interrupts that cause unwanted effects in the system that is being captured. A first methodology allows access to protected memory blocks so that instructions may be read from those memory blocks. A second methodology provides for the trace output buffer to be accessed using physical addressing. A third methodology traces only instruction addresses, which are resolved later during a post-processing phase of operation. A fourth methodology comprises multiple different methods for obtaining copies of instructions that have already executed rather than obtaining them before they are executed.

Abstract: A method, apparatus, and computer instructions for generating coverage data during execution of code in the data processing system. During execution of the code, a determination is made as to whether an access indicator is associated with an instruction in response to executing the instruction in the code by a processor in the data processing system. If the access indicator is associated with the instruction, a state of the access indicator is changed, by the processor, when the instruction is executed. In this manner, coverage data for executed instructions is generated by the processor during execution of the code.